1 /*
2  * Copyright (c) 2019-2020 Cobham Gaisler AB
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #ifndef ZEPHYR_ARCH_SPARC_INCLUDE_OFFSETS_SHORT_ARCH_H_
8 #define ZEPHYR_ARCH_SPARC_INCLUDE_OFFSETS_SHORT_ARCH_H_
9 
10 #include <offsets.h>
11 
12 #define _thread_offset_to_y \
13 	(___thread_t_callee_saved_OFFSET + ___callee_saved_t_y_OFFSET)
14 
15 #define _thread_offset_to_l0_and_l1 \
16 	(___thread_t_callee_saved_OFFSET + ___callee_saved_t_l0_and_l1_OFFSET)
17 
18 #define _thread_offset_to_l2 \
19 	(___thread_t_callee_saved_OFFSET + ___callee_saved_t_l2_OFFSET)
20 
21 #define _thread_offset_to_l4 \
22 	(___thread_t_callee_saved_OFFSET + ___callee_saved_t_l4_OFFSET)
23 
24 #define _thread_offset_to_l6 \
25 	(___thread_t_callee_saved_OFFSET + ___callee_saved_t_l6_OFFSET)
26 
27 #define _thread_offset_to_i0 \
28 	(___thread_t_callee_saved_OFFSET + ___callee_saved_t_i0_OFFSET)
29 
30 #define _thread_offset_to_i2 \
31 	(___thread_t_callee_saved_OFFSET + ___callee_saved_t_i2_OFFSET)
32 
33 #define _thread_offset_to_i4 \
34 	(___thread_t_callee_saved_OFFSET + ___callee_saved_t_i4_OFFSET)
35 
36 #define _thread_offset_to_i6 \
37 	(___thread_t_callee_saved_OFFSET + ___callee_saved_t_i6_OFFSET)
38 
39 #define _thread_offset_to_o6 \
40 	(___thread_t_callee_saved_OFFSET + ___callee_saved_t_o6_OFFSET)
41 
42 #define _thread_offset_to_psr \
43 	(___thread_t_callee_saved_OFFSET + ___callee_saved_t_psr_OFFSET)
44 
45 #endif /* ZEPHYR_ARCH_SPARC_INCLUDE_OFFSETS_SHORT_ARCH_H_ */
46