1 /*
2 * Copyright (c) 2014 Wind River Systems, Inc.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 /**
8 * @file
9 * @brief Kernel fatal error handler for ARM Cortex-M and Cortex-R
10 *
11 * This module provides the z_arm_fatal_error() routine for ARM Cortex-M
12 * and Cortex-R CPUs.
13 */
14
15 #include <zephyr/kernel.h>
16 #include <kernel_arch_data.h>
17 #include <zephyr/logging/log.h>
18 LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
19
esf_dump(const z_arch_esf_t * esf)20 static void esf_dump(const z_arch_esf_t *esf)
21 {
22 LOG_ERR("r0/a1: 0x%08x r1/a2: 0x%08x r2/a3: 0x%08x",
23 esf->basic.a1, esf->basic.a2, esf->basic.a3);
24 LOG_ERR("r3/a4: 0x%08x r12/ip: 0x%08x r14/lr: 0x%08x",
25 esf->basic.a4, esf->basic.ip, esf->basic.lr);
26 LOG_ERR(" xpsr: 0x%08x", esf->basic.xpsr);
27 #if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
28 for (int i = 0; i < ARRAY_SIZE(esf->fpu.s); i += 4) {
29 LOG_ERR("s[%2d]: 0x%08x s[%2d]: 0x%08x"
30 " s[%2d]: 0x%08x s[%2d]: 0x%08x",
31 i, (uint32_t)esf->fpu.s[i],
32 i + 1, (uint32_t)esf->fpu.s[i + 1],
33 i + 2, (uint32_t)esf->fpu.s[i + 2],
34 i + 3, (uint32_t)esf->fpu.s[i + 3]);
35 }
36 #ifdef CONFIG_VFP_FEATURE_REGS_S64_D32
37 for (int i = 0; i < ARRAY_SIZE(esf->fpu.d); i += 4) {
38 LOG_ERR("d[%2d]: 0x%16llx d[%2d]: 0x%16llx"
39 " d[%2d]: 0x%16llx d[%2d]: 0x%16llx",
40 i, (uint64_t)esf->fpu.d[i],
41 i + 1, (uint64_t)esf->fpu.d[i + 1],
42 i + 2, (uint64_t)esf->fpu.d[i + 2],
43 i + 3, (uint64_t)esf->fpu.d[i + 3]);
44 }
45 #endif
46 LOG_ERR("fpscr: 0x%08x", esf->fpu.fpscr);
47 #endif
48 #if defined(CONFIG_EXTRA_EXCEPTION_INFO)
49 const struct _callee_saved *callee = esf->extra_info.callee;
50
51 if (callee != NULL) {
52 LOG_ERR("r4/v1: 0x%08x r5/v2: 0x%08x r6/v3: 0x%08x",
53 callee->v1, callee->v2, callee->v3);
54 LOG_ERR("r7/v4: 0x%08x r8/v5: 0x%08x r9/v6: 0x%08x",
55 callee->v4, callee->v5, callee->v6);
56 LOG_ERR("r10/v7: 0x%08x r11/v8: 0x%08x psp: 0x%08x",
57 callee->v7, callee->v8, callee->psp);
58 }
59
60 LOG_ERR("EXC_RETURN: 0x%0x", esf->extra_info.exc_return);
61
62 #endif /* CONFIG_EXTRA_EXCEPTION_INFO */
63 LOG_ERR("Faulting instruction address (r15/pc): 0x%08x",
64 esf->basic.pc);
65 }
66
z_arm_fatal_error(unsigned int reason,const z_arch_esf_t * esf)67 void z_arm_fatal_error(unsigned int reason, const z_arch_esf_t *esf)
68 {
69
70 if (esf != NULL) {
71 esf_dump(esf);
72 }
73 z_fatal_error(reason, esf);
74 }
75
76 /**
77 * @brief Handle a software-generated fatal exception
78 * (e.g. kernel oops, panic, etc.).
79 *
80 * Notes:
81 * - the function is invoked in SVC Handler
82 * - if triggered from nPRIV mode, only oops and stack fail error reasons
83 * may be propagated to the fault handling process.
84 * - We expect the supplied exception stack frame to always be a valid
85 * frame. That is because, if the ESF cannot be stacked during an SVC,
86 * a processor fault (e.g. stacking error) will be generated, and the
87 * fault handler will executed instead of the SVC.
88 *
89 * @param esf exception frame
90 * @param callee_regs Callee-saved registers (R4-R11)
91 */
z_do_kernel_oops(const z_arch_esf_t * esf,_callee_saved_t * callee_regs)92 void z_do_kernel_oops(const z_arch_esf_t *esf, _callee_saved_t *callee_regs)
93 {
94 #if !(defined(CONFIG_EXTRA_EXCEPTION_INFO) && defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE))
95 ARG_UNUSED(callee_regs);
96 #endif
97 /* Stacked R0 holds the exception reason. */
98 unsigned int reason = esf->basic.r0;
99
100 #if defined(CONFIG_USERSPACE)
101 if (z_arm_preempted_thread_in_user_mode(esf)) {
102 /*
103 * Exception triggered from user mode.
104 *
105 * User mode is only allowed to induce oopses and stack check
106 * failures via software-triggered system fatal exceptions.
107 */
108 if (!((esf->basic.r0 == K_ERR_KERNEL_OOPS) ||
109 (esf->basic.r0 == K_ERR_STACK_CHK_FAIL))) {
110
111 reason = K_ERR_KERNEL_OOPS;
112 }
113 }
114
115 #endif /* CONFIG_USERSPACE */
116
117 #if !defined(CONFIG_EXTRA_EXCEPTION_INFO)
118 z_arm_fatal_error(reason, esf);
119 #else
120 z_arch_esf_t esf_copy;
121
122 memcpy(&esf_copy, esf, offsetof(z_arch_esf_t, extra_info));
123 #if defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
124 /* extra exception info is collected in callee_reg param
125 * on CONFIG_ARMV7_M_ARMV8_M_MAINLINE
126 */
127
128 esf_copy.extra_info = (struct __extra_esf_info) {
129 .callee = callee_regs,
130 };
131 #else
132 /* extra exception info is not collected for kernel oops
133 * path today so we make a copy of the ESF and zero out
134 * that information
135 */
136 esf_copy.extra_info = (struct __extra_esf_info) { 0 };
137 #endif /* CONFIG_ARMV7_M_ARMV8_M_MAINLINE */
138
139 z_arm_fatal_error(reason, &esf_copy);
140 #endif /* CONFIG_EXTRA_EXCEPTION_INFO */
141 }
142
arch_syscall_oops(void * ssf_ptr)143 FUNC_NORETURN void arch_syscall_oops(void *ssf_ptr)
144 {
145 uint32_t *ssf_contents = ssf_ptr;
146 z_arch_esf_t oops_esf = { 0 };
147
148 /* TODO: Copy the rest of the register set out of ssf_ptr */
149 oops_esf.basic.pc = ssf_contents[3];
150
151 z_arm_fatal_error(K_ERR_KERNEL_OOPS, &oops_esf);
152 CODE_UNREACHABLE;
153 }
154
