1 /*
2  * Copyright (c) 2014 Wind River Systems, Inc.
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 /**
8  * @file
9  * @brief Interrupt helper functions (ARC)
10  *
11  * This file contains private kernel structures definitions and various
12  * other definitions for the ARCv2 processor architecture.
13  */
14 
15 #ifndef ZEPHYR_ARCH_ARC_INCLUDE_V2_IRQ_H_
16 #define ZEPHYR_ARCH_ARC_INCLUDE_V2_IRQ_H_
17 
18 #include <zephyr/arch/cpu.h>
19 
20 #ifdef __cplusplus
21 extern "C" {
22 #endif
23 
24 #define _ARC_V2_AUX_IRQ_CTRL_BLINK (1 << 9)
25 #define _ARC_V2_AUX_IRQ_CTRL_LOOP_REGS (1 << 10)
26 #define _ARC_V2_AUX_IRQ_CTRL_U (1 << 11)
27 #define _ARC_V2_AUX_IRQ_CTRL_LP (1 << 13)
28 #define _ARC_V2_AUX_IRQ_CTRL_14_REGS 7
29 #define _ARC_V2_AUX_IRQ_CTRL_16_REGS 8
30 #define _ARC_V2_AUX_IRQ_CTRL_32_REGS 16
31 
32 
33 #ifdef CONFIG_ARC_SECURE_FIRMWARE
34 #define _ARC_V2_DEF_IRQ_LEVEL (ARC_N_IRQ_START_LEVEL - 1)
35 #else
36 #define _ARC_V2_DEF_IRQ_LEVEL (CONFIG_NUM_IRQ_PRIO_LEVELS - 1)
37 #endif
38 
39 #define _ARC_V2_WAKE_IRQ_LEVEL _ARC_V2_DEF_IRQ_LEVEL
40 
41 /*
42  * INIT_IRQ_LOCK_KEY is init interrupt level setting of a thread.
43  * It's configured by seti instruction when a thread starts to run
44  *, i.e., z_thread_entry_wrapper and z_user_thread_entry_wrapper
45  */
46 #define _ARC_V2_INIT_IRQ_LOCK_KEY (0x10 | _ARC_V2_DEF_IRQ_LEVEL)
47 
48 #ifndef _ASMLANGUAGE
49 /*
50  * z_irq_setup
51  *
52  * Configures interrupt handling parameters
53  */
z_irq_setup(void)54 static ALWAYS_INLINE void z_irq_setup(void)
55 {
56 	uint32_t aux_irq_ctrl_value = (
57 #ifdef CONFIG_ARC_HAS_ZOL
58 		_ARC_V2_AUX_IRQ_CTRL_LOOP_REGS | /* save lp_xxx registers */
59 #endif /* CONFIG_ARC_HAS_ZOL */
60 #ifdef CONFIG_CODE_DENSITY
61 		_ARC_V2_AUX_IRQ_CTRL_LP | /* save code density registers */
62 #endif
63 		_ARC_V2_AUX_IRQ_CTRL_BLINK     | /* save blink */
64 		_ARC_V2_AUX_IRQ_CTRL_14_REGS     /* save r0 -> r13 (caller-saved) */
65 	);
66 
67 	z_arc_cpu_sleep_mode = _ARC_V2_WAKE_IRQ_LEVEL;
68 
69 #ifdef CONFIG_ARC_NORMAL_FIRMWARE
70 	/* normal mode cannot write irq_ctrl, ignore it */
71 	aux_irq_ctrl_value = aux_irq_ctrl_value;
72 #else
73 	z_arc_v2_aux_reg_write(_ARC_V2_AUX_IRQ_CTRL, aux_irq_ctrl_value);
74 #endif
75 }
76 
77 #endif /* _ASMLANGUAGE */
78 
79 #ifdef __cplusplus
80 }
81 #endif
82 
83 #endif /* ZEPHYR_ARCH_ARC_INCLUDE_V2_IRQ_H_ */
84