1 /*
2  * Copyright (c) 2022 Intel Corporation
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 /* Read from PCI configuration space */
8 uint32_t emul_pci_read(unsigned int reg);
9 
10 /* Write to PCI configuration space */
11 void emul_pci_write(pcie_bdf_t bdf, unsigned int reg, uint32_t value);
12 
13 void emul_out8(uint8_t data, io_port_t addr);
14 uint8_t emul_in8(io_port_t addr);
15 
16 void emul_set_io(uint8_t value, io_port_t addr);
17 uint8_t emul_get_io(io_port_t addr);
18 
19 enum emul_isr_type {
20 	EMUL_SMBUS_INTR,
21 	EMUL_SMBUS_SMBALERT,
22 	EMUL_SMBUS_HOST_NOTIFY,
23 };
24 
25 void run_isr(enum emul_isr_type);
26 
27 struct smbus_peripheral {
28 	sys_snode_t node;
29 	uint8_t raw_data[256];
30 	uint8_t offset;
31 	uint8_t addr;
32 	bool smbalert;
33 	bool smbalert_handled;
34 	bool host_notify;
35 };
36 
37 bool peripheral_handle_host_notify(void);
38 
peripheral_clear_smbalert(struct smbus_peripheral * periph)39 static inline void peripheral_clear_smbalert(struct smbus_peripheral *periph)
40 {
41 	periph->smbalert_handled = false;
42 }
43 
44 void emul_register_smbus_peripheral(struct smbus_peripheral *peripheral);
45