1/*
2 * Copyright (c) 2021 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <xtensa/xtensa.dtsi>
8#include <mem.h>
9
10/ {
11	cpus {
12		#address-cells = <1>;
13		#size-cells = <0>;
14
15		cpu0: cpu@0 {
16			device_type = "cpu";
17			compatible = "cdns,tensilica-xtensa-lx6";
18			reg = <0>;
19		};
20	};
21
22	sram0: memory@92400000 {
23		device_type = "memory";
24		compatible = "mmio-sram";
25		reg = <0x92400000 DT_SIZE_K(512)>;
26	};
27
28	sram1: memory@92c00000 {
29		device_type = "memory";
30		compatible = "mmio-sram";
31		reg = <0x92c00000 DT_SIZE_K(512)>;
32	};
33};
34