1# Copyright 2022 NXP
2# SPDX-License-Identifier: Apache-2.0
3
4compatible: "nxp,lpc11u6x-pinctrl"
5
6include:
7  - name: base.yaml
8  - name: nxp,lpc-iocon-pinctrl.yaml
9    child-binding:
10      child-binding:
11        property-allowlist:
12          - pinmux
13          - nxp,invert
14          - nxp,analog-mode
15          - nxp,i2c-mode
16          - nxp,i2c-filter
17
18child-binding:
19  description: LPC IOCON pin controller pin group
20  child-binding:
21    description: |
22      LPC IOCON pin controller pin configuration node
23
24    include:
25      - name: pincfg-node.yaml
26        property-allowlist:
27          - drive-open-drain
28          - bias-pull-up
29          - bias-pull-down
30          - drive-push-pull
31          - input-schmitt-enable
32
33    properties:
34      nxp,digital-filter:
35        type: int
36        default: 0
37        enum:
38          - 0
39          - 1
40          - 2
41          - 3
42        description: |
43          Enable digital filter. Set number of clock cycles to use as rejection
44          threshold for input pulses. 0 disables the filter. Only valid for
45          lpc11u6x SOC. Filter defaults to disabled, as this is default reset
46          value for SOC
47      nxp,filter-clock-div:
48        type: int
49        default: 0
50        enum:
51          - 0
52          - 1
53          - 2
54          - 3
55          - 4
56          - 5
57          - 6
58        description: |
59          set peripheral clock divider for input filter sampling clock
60          IOCONCLKDIV. Only valid for lpc11u6x SOC. Default to 0, as this
61          is the default reset value for the SOC.
62      nxp,disable-analog-filter:
63        type: boolean
64        description: |
65          Disable fixed 10 ns input glitch analog filter. Only valid for lpc11u6x
66          SOC, on analog pins. Note that this filter is enabled on reset, hence
67          the choice to make disabling the filter opt-in
68