1 /* 2 * Copyright (c) 2016 BayLibre, SAS 3 * Copyright (c) 2017 Linaro Ltd 4 * 5 * SPDX-License-Identifier: Apache-2.0 6 * 7 */ 8 9 #ifndef ZEPHYR_DRIVERS_I2C_I2C_LL_STM32_H_ 10 #define ZEPHYR_DRIVERS_I2C_I2C_LL_STM32_H_ 11 12 #ifdef CONFIG_I2C_STM32_BUS_RECOVERY 13 #include <zephyr/drivers/gpio.h> 14 #endif /* CONFIG_I2C_STM32_BUS_RECOVERY */ 15 16 typedef void (*irq_config_func_t)(const struct device *port); 17 18 #if DT_HAS_COMPAT_STATUS_OKAY(st_stm32_i2c_v2) 19 /** 20 * @brief structure to convey optional i2c timings settings 21 */ 22 struct i2c_config_timing { 23 /* i2c peripheral clock in Hz */ 24 uint32_t periph_clock; 25 /* i2c bus speed in Hz */ 26 uint32_t i2c_speed; 27 /* I2C_TIMINGR register value of i2c v2 peripheral */ 28 uint32_t timing_setting; 29 }; 30 #endif 31 32 struct i2c_stm32_config { 33 #ifdef CONFIG_I2C_STM32_INTERRUPT 34 irq_config_func_t irq_config_func; 35 #endif 36 #ifdef CONFIG_I2C_STM32_BUS_RECOVERY 37 struct gpio_dt_spec scl; 38 struct gpio_dt_spec sda; 39 #endif /* CONFIG_I2C_STM32_BUS_RECOVERY */ 40 const struct stm32_pclken *pclken; 41 size_t pclk_len; 42 I2C_TypeDef *i2c; 43 uint32_t bitrate; 44 const struct pinctrl_dev_config *pcfg; 45 #if DT_HAS_COMPAT_STATUS_OKAY(st_stm32_i2c_v2) 46 const struct i2c_config_timing *timings; 47 size_t n_timings; 48 #endif 49 }; 50 51 struct i2c_stm32_data { 52 #ifdef CONFIG_I2C_STM32_INTERRUPT 53 struct k_sem device_sync_sem; 54 #endif 55 struct k_sem bus_mutex; 56 uint32_t dev_config; 57 #ifdef CONFIG_I2C_STM32_V1 58 uint16_t slave_address; 59 #endif 60 struct { 61 #ifdef CONFIG_I2C_STM32_V1 62 unsigned int is_restart; 63 unsigned int flags; 64 #endif 65 unsigned int is_write; 66 unsigned int is_arlo; 67 unsigned int is_nack; 68 unsigned int is_err; 69 struct i2c_msg *msg; 70 unsigned int len; 71 uint8_t *buf; 72 } current; 73 #ifdef CONFIG_I2C_TARGET 74 bool master_active; 75 struct i2c_target_config *slave_cfg; 76 #ifdef CONFIG_I2C_STM32_V2 77 struct i2c_target_config *slave2_cfg; 78 #endif 79 bool slave_attached; 80 #endif 81 }; 82 83 int32_t stm32_i2c_msg_write(const struct device *dev, struct i2c_msg *msg, 84 uint8_t *flg, 85 uint16_t sadr); 86 int32_t stm32_i2c_msg_read(const struct device *dev, struct i2c_msg *msg, 87 uint8_t *flg, 88 uint16_t sadr); 89 int32_t stm32_i2c_configure_timing(const struct device *dev, uint32_t clk); 90 int i2c_stm32_runtime_configure(const struct device *dev, uint32_t config); 91 92 void stm32_i2c_event_isr(void *arg); 93 void stm32_i2c_error_isr(void *arg); 94 #ifdef CONFIG_I2C_STM32_COMBINED_INTERRUPT 95 void stm32_i2c_combined_isr(void *arg); 96 #endif 97 98 #ifdef CONFIG_I2C_TARGET 99 int i2c_stm32_target_register(const struct device *dev, struct i2c_target_config *config); 100 int i2c_stm32_target_unregister(const struct device *dev, struct i2c_target_config *config); 101 #endif 102 103 #endif /* ZEPHYR_DRIVERS_I2C_I2C_LL_STM32_H_ */ 104
