1# NPCX eSPI driver configuration options
2
3# Copyright (c) 2020 Nuvoton Technology Corporation.
4# SPDX-License-Identifier: Apache-2.0
5
6config ESPI_NPCX
7	bool "Nuvoton NPCX embedded controller (EC) ESPI driver"
8	depends on SOC_FAMILY_NPCX
9	help
10	  This option enables the Intel Enhanced Serial Peripheral Interface
11	  (eSPI) for NPCX family of processors.
12
13config ESPI_NPCX_PERIPHERAL_ACPI_SHD_MEM_SIZE
14	int "Host I/O peripheral port size for shared memory in npcx series"
15	depends on ESPI_NPCX || ESPI_PERIPHERAL_ACPI_SHM_REGION
16	default 256
17	help
18	  This is the port size used by the Host and EC to communicate over
19	  the shared memory region to return the ACPI response data. Please
20	  notice the valid value in npcx ec series for this option is 8/16/32/
21	  64/128/256/512/1024/2048/4096 bytes.
22
23config ESPI_NPCX_PERIPHERAL_HOST_CMD_PARAM_SIZE
24	int "Host I/O peripheral port size for ec host command in npcx series"
25	depends on ESPI_NPCX || ESPI_PERIPHERAL_EC_HOST_CMD
26	default 256
27	help
28	  This is the port size used by the Host and EC to communicate over
29	  the shared memory region to return the host command parameter data.
30	  Please notice the valid value in npcx ec series for this option is
31	  8/16/32/64/128/256/512/1024/2048/4096 bytes.
32
33config ESPI_NPCX_BYPASS_CH_ENABLE_FATAL_ERROR
34	bool
35	depends on SOC_SERIES_NPCX7 || SOC_SERIES_NPCX9
36	default y
37	help
38	  Workaround the issue documented in NPCX99nF errata rev1_2, No.3.10.
39	  Enabling an eSPI channel during an eSPI transaction might
40	  (with low probability) cause the eSPI_SIF module to transition to
41	  a wrong state and therefore response with FATAL_ERROR on an incoming
42	  transaction.
43
44config ESPI_NPCX_PERIPHERAL_DEBUG_PORT_80_MULTI_BYTE
45	bool "Host can write 1/2/4 bytes of Port80 data in a eSPI transaction"
46	depends on SOC_SERIES_NPCX9 && ESPI_PERIPHERAL_DEBUG_PORT_80
47	help
48	  EC can accept 1/2/4 bytes of Port 80 data written from the Host in an
49	  eSPI transaction.
50
51config ESPI_NPCX_PERIPHERAL_DEBUG_PORT_80_RING_BUF_SIZE
52	int "Debug Port80 ring buffer size"
53	depends on ESPI_NPCX_PERIPHERAL_DEBUG_PORT_80_MULTI_BYTE
54	default 256
55	help
56	  The size of the ring buffer in byte used by the Port80 ISR to store
57	  Postcodes from Host.
58
59# The default value 'y' for the existing options if ESPI_NPCX is selected.
60if ESPI_NPCX
61
62config ESPI_OOB_CHANNEL
63	default  y
64
65config ESPI_PERIPHERAL_8042_KBC
66	default y
67
68config ESPI_PERIPHERAL_HOST_IO
69	default y
70
71config ESPI_PERIPHERAL_DEBUG_PORT_80
72	default y
73
74config ESPI_PERIPHERAL_EC_HOST_CMD
75	default y
76
77config ESPI_PERIPHERAL_ACPI_SHM_REGION
78	default y
79
80config ESPI_PERIPHERAL_CUSTOM_OPCODE
81	default y
82
83endif #ESPI_NPCX
84