1# SOF DMIC configuration options
2
3# Copyright (c) 2022 Intel Corporation
4# SPDX-License-Identifier: Apache-2.0
5
6config DAI_INTEL_DMIC
7	bool "Intel digital PDM microphone driver support for DAI interface"
8	default y
9	depends on DT_HAS_INTEL_DAI_DMIC_ENABLED
10	depends on PM_DEVICE_RUNTIME
11	help
12	  Enable Intel digital PDM microphone driver for DAI interface
13
14if DAI_INTEL_DMIC
15
16choice
17	prompt "Driver operation mode"
18	default DAI_INTEL_DMIC_NHLT
19	help
20	  The driver can support two operation modes.
21	  1. A HW registers dump blob that is passed via IPC
22	  2. DAI tokens those describe the use case PCM format
23	  and PDM bus and microphone parameters
24
25config DAI_INTEL_DMIC_NHLT
26	bool "Use NHLT DMIC blob"
27	help
28	  All registers configuration is retrieved from blob. The
29	  number of channels, sample rate, and PCM format are
30	  defined in the blob and there are no runtime made
31	  configuration choices.
32
33config DAI_INTEL_DMIC_TPLG_PARAMS
34	bool "Use parameters from topology - WIP"
35	help
36	  All registers configuration is computed on the fly
37	  based on use case and microphone datasheet parameters
38	  and topology defined PCM format. The parameters are
39	  easy to to customize in the topology.
40	  WORK IN PROGRESS, not enabled in the driver yet
41
42endchoice
43
44config DAI_DMIC_HAS_OWNERSHIP
45	bool "Use DMIC ownership claim/release"
46	default n
47	help
48	 a feature introduced in ACE1.5 hardware
49	 dmic ownership must be claimed before use of dmic
50
51config DAI_DMIC_HAS_MULTIPLE_LINE_SYNC
52	bool "Use DMIC sync for multiple lines"
53	default n
54	help
55	 a feature introduced in ACE1.5 hardware
56	 dmic sync registers must be set before use of dmic
57
58config DAI_DMIC_HW_CONTROLLERS
59	int "Number of hardware controllers in the system"
60	default 2
61
62config DAI_DMIC_HW_FIFOS
63	int "Number of stream FIFOs in DMIC controller"
64	default 2
65
66config DAI_DMIC_HW_IOCLK
67	int "IO Clock value for DMIC"
68	default 19200000
69
70config DAI_DMIC_PLATFORM_SYNC_PERIOD
71	int "Sync period per platform"
72	default 4000
73	help
74	  DMIC sync period used for:
75	  CONFIG_DAI_DMIC_HW_IOCLK / CONFIG_DAI_DMIC_PLATFORM_SYNC_PERIOD
76	  From spec: E.g. for 19.2 MHz XTAL oscillator clock, 4 KHz sync period,
77	  the value to be programmed is 4799 (12BFh)
78
79endif
80