1# SPDX-License-Identifier: Apache-2.0 2 3# Determines what argument to give to -mcpu= based on the 4# KConfig'uration and sets this to GCC_M_CPU 5 6if("${ARCH}" STREQUAL "arm") 7 if (CONFIG_CPU_CORTEX_M0) 8 set(GCC_M_CPU cortex-m0) 9 elseif(CONFIG_CPU_CORTEX_M0PLUS) 10 set(GCC_M_CPU cortex-m0plus) 11 elseif(CONFIG_CPU_CORTEX_M1) 12 set(GCC_M_CPU cortex-m1) 13 elseif(CONFIG_CPU_CORTEX_M3) 14 set(GCC_M_CPU cortex-m3) 15 elseif(CONFIG_CPU_CORTEX_M4) 16 set(GCC_M_CPU cortex-m4) 17 elseif(CONFIG_CPU_CORTEX_M7) 18 set(GCC_M_CPU cortex-m7) 19 elseif(CONFIG_CPU_CORTEX_M23) 20 set(GCC_M_CPU cortex-m23) 21 elseif(CONFIG_CPU_CORTEX_M33) 22 if (CONFIG_ARMV8_M_DSP) 23 set(GCC_M_CPU cortex-m33) 24 else() 25 set(GCC_M_CPU cortex-m33+nodsp) 26 endif() 27 elseif(CONFIG_CPU_CORTEX_M55) 28 if (CONFIG_ARMV8_1_M_MVEF) 29 set(GCC_M_CPU cortex-m55) 30 elseif(CONFIG_ARMV8_1_M_MVEI) 31 set(GCC_M_CPU cortex-m55+nomve.fp) 32 elseif(CONFIG_ARMV8_M_DSP) 33 set(GCC_M_CPU cortex-m55+nomve) 34 else() 35 set(GCC_M_CPU cortex-m55+nodsp) 36 endif() 37 elseif(CONFIG_CPU_CORTEX_R4) 38 if(CONFIG_FPU AND CONFIG_CPU_HAS_VFP) 39 set(GCC_M_CPU cortex-r4f) 40 else() 41 set(GCC_M_CPU cortex-r4) 42 endif() 43 elseif(CONFIG_CPU_CORTEX_R5) 44 set(GCC_M_CPU cortex-r5) 45 if(CONFIG_FPU AND CONFIG_CPU_HAS_VFP) 46 if(NOT CONFIG_VFP_FEATURE_DOUBLE_PRECISION) 47 set(GCC_M_CPU ${GCC_M_CPU}+nofp.dp) 48 endif() 49 else() 50 set(GCC_M_CPU ${GCC_M_CPU}+nofp) 51 endif() 52 elseif(CONFIG_CPU_CORTEX_R7) 53 set(GCC_M_CPU cortex-r7) 54 if(CONFIG_FPU AND CONFIG_CPU_HAS_VFP) 55 if(NOT CONFIG_VFP_FEATURE_DOUBLE_PRECISION) 56 set(GCC_M_CPU ${GCC_M_CPU}+nofp.dp) 57 endif() 58 else() 59 set(GCC_M_CPU ${GCC_M_CPU}+nofp) 60 endif() 61 elseif(CONFIG_CPU_CORTEX_R52) 62 set(GCC_M_CPU cortex-r52) 63 if(CONFIG_FPU AND CONFIG_CPU_HAS_VFP) 64 if(NOT CONFIG_VFP_FEATURE_DOUBLE_PRECISION) 65 set(GCC_M_CPU ${GCC_M_CPU}+nofp.dp) 66 endif() 67 endif() 68 elseif(CONFIG_CPU_CORTEX_A9) 69 set(GCC_M_CPU cortex-a9) 70 else() 71 message(FATAL_ERROR "Expected CONFIG_CPU_CORTEX_x to be defined") 72 endif() 73elseif("${ARCH}" STREQUAL "arm64") 74 if(CONFIG_CPU_CORTEX_A53) 75 set(GCC_M_CPU cortex-a53) 76 elseif(CONFIG_CPU_CORTEX_A55) 77 set(GCC_M_CPU cortex-a55) 78 elseif(CONFIG_CPU_CORTEX_A72) 79 set(GCC_M_CPU cortex-a72) 80 elseif(CONFIG_CPU_CORTEX_R82) 81 set(GCC_M_ARCH armv8.4-a+nolse) 82 endif() 83elseif("${ARCH}" STREQUAL "arc") 84 if(CONFIG_CPU_EM4_FPUS) 85 set(GCC_M_CPU em4_fpus) 86 elseif(CONFIG_CPU_EM4_DMIPS) 87 set(GCC_M_CPU em4_dmips) 88 elseif(CONFIG_CPU_EM4_FPUDA) 89 set(GCC_M_CPU em4_fpuda) 90 elseif(CONFIG_CPU_HS3X) 91 set(GCC_M_CPU archs) 92 elseif(CONFIG_CPU_HS4X) 93 set(GCC_M_CPU hs4x) 94 elseif(CONFIG_CPU_HS5X) 95 set(GCC_M_CPU hs5x) 96 elseif(CONFIG_CPU_HS6X) 97 set(GCC_M_CPU hs6x) 98 elseif(CONFIG_CPU_EM4) 99 set(GCC_M_CPU arcem) 100 elseif(CONFIG_CPU_EM6) 101 set(GCC_M_CPU arcem) 102 endif() 103endif() 104