1/*
2 * Copyright (c) 2021 SILA Embedded Solutions GmbH
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8#include <st/h7/stm32h735Xg.dtsi>
9#include <st/h7/stm32h735igkx-pinctrl.dtsi>
10#include "pmod_connector.dtsi"
11
12/ {
13	model = "STMicroelectronics STM32H735G DISCOVERY board";
14	compatible = "st,stm32h735g-disco";
15
16	chosen {
17		zephyr,console = &usart3;
18		zephyr,shell-uart = &usart3;
19		zephyr,sram = &sram0;
20		zephyr,flash = &flash0;
21	};
22
23	leds {
24		compatible = "gpio-leds";
25		red_led: led_1 {
26			gpios = <&gpioc 2 GPIO_ACTIVE_LOW>;
27			label = "User LD2";
28		};
29		green_led: led_2 {
30			gpios = <&gpioc 3 GPIO_ACTIVE_LOW>;
31			label = "User LD1";
32		};
33	};
34
35	gpio_keys {
36		compatible = "gpio-keys";
37		user_button: button {
38			label = "User";
39			gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
40		};
41	};
42
43	aliases {
44		led0 = &red_led;
45		led1 = &green_led;
46		sw0 = &user_button;
47		volt-sensor1 = &vbat;
48	};
49};
50
51&clk_hse {
52	clock-frequency = <DT_FREQ_M(25)>;
53	status = "okay";
54};
55
56&clk_lse {
57	status = "okay";
58};
59
60&clk_lsi {
61	status = "okay";
62};
63
64&clk_hsi48 {
65	status = "okay";
66};
67
68&pll {
69	div-m = <5>;
70	mul-n = <110>;
71	div-p = <1>;
72	div-q = <4>;
73	div-r = <2>;
74	clocks = <&clk_hse>;
75	status = "okay";
76};
77
78&rcc {
79	clocks = <&pll>;
80	clock-frequency = <DT_FREQ_M(550)>;
81	d1cpre = <1>;
82	hpre = <2>;
83	d1ppre = <2>;
84	d2ppre1 = <2>;
85	d2ppre2 = <2>;
86	d3ppre = <2>;
87};
88
89&usart3 {
90	pinctrl-0 = <&usart3_tx_pd8 &usart3_rx_pd9>;
91	pinctrl-names = "default";
92	current-speed = <115200>;
93	status = "okay";
94};
95
96&uart7 {
97	pinctrl-0 = <&uart7_tx_pf7 &uart7_rx_pf6>;
98	pinctrl-names = "default";
99	current-speed = <115200>;
100};
101
102&i2c4 {
103	pinctrl-0 = <&i2c4_scl_pf14 &i2c4_sda_pf15>;
104	pinctrl-names = "default";
105};
106
107&rng {
108	status = "okay";
109};
110
111&adc1 {
112	pinctrl-0 = <&adc1_inp0_pa0_c>;
113	pinctrl-names = "default";
114	status = "okay";
115};
116
117&mac {
118	pinctrl-0 = <&eth_mdc_pc1
119		     &eth_rxd0_pc4
120		     &eth_rxd1_pc5
121		     &eth_ref_clk_pa1
122		     &eth_mdio_pa2
123		     &eth_crs_dv_pa7
124		     &eth_tx_en_pb11
125		     &eth_txd0_pb12
126		     &eth_txd1_pb13>;
127	pinctrl-names = "default";
128	status = "okay";
129};
130
131&sdmmc1 {
132	pinctrl-0 = <&sdmmc1_d0_pc8
133		     &sdmmc1_d1_pc9
134		     &sdmmc1_d2_pc10
135		     &sdmmc1_d3_pc11
136		     &sdmmc1_ck_pc12
137		     &sdmmc1_cmd_pd2>;
138	pinctrl-names = "default";
139	cd-gpios = <&gpiof 5 GPIO_ACTIVE_LOW>;
140};
141
142&octospi1 {
143	pinctrl-0 = <&octospim_p1_clk_pf10 &octospim_p1_ncs_pg6
144		     &octospim_p1_io0_pd11 &octospim_p1_io1_pd12
145		     &octospim_p1_io2_pe2 &octospim_p1_io3_pd13
146		     &octospim_p1_io4_pd4 &octospim_p1_io5_pd5
147		     &octospim_p1_io6_pg9 &octospim_p1_io7_pd7
148		     &octospim_p1_dqs_pb2>;
149	pinctrl-names = "default";
150
151	status = "okay";
152
153	mx25lm51245: ospi-nor-flash@0 {
154		compatible = "st,stm32-ospi-nor";
155		reg = <0>;
156		ospi-max-frequency = <DT_FREQ_M(50)>;
157		size = <DT_SIZE_M(512)>; /* 64 MBytes */
158		spi-bus-width = <OSPI_OPI_MODE>;
159		data-rate = <OSPI_DTR_TRANSFER>;
160		status = "okay";
161
162		partitions {
163			   compatible = "fixed-partitions";
164			   #address-cells = <1>;
165			   #size-cells = <1>;
166
167			   partition@0 {
168			       label = "nor";
169			       reg = <0x00000000 DT_SIZE_M(4)>;
170			   };
171		};
172	};
173};
174
175&rtc {
176	clocks = <&rcc STM32_CLOCK_BUS_APB4 0x00010000>,
177		 <&rcc STM32_SRC_LSI RTC_SEL(2)>;
178	status = "okay";
179
180	backup_regs {
181		status = "okay";
182	};
183};
184
185&vbat {
186	status = "okay";
187};
188