1.. _faze:
2
3Seagate FireCuda Gaming SSD (FaZe) board
4########################################
5
6Overview
7********
8
9The FaZe board can be found in the Seagate FireCuda Gaming SSD devices. A NVMe
10SSD and two chips are embedded: an ASMedia ASM2364 USB-to-PCIe bridge controller
11and a NXP LPC11U67 MCU. The former is handling the USB type-C to SSD I/Os while
12the latter is dedicated to the LED effects. The two chips are connected together
13through I2C and GPIOs.
14
15This Zephyr port is running on the NXP LPC11U67 MCU.
16
17.. image:: firecuda-gaming-ssd.jpg
18   :align: center
19   :alt: Seagate FireCuda Gaming SSD
20
21Hardware
22********
23
24- NXP LPC11U67 MCU (LQFP48 package):
25
26  - ARM Cortex-M0+
27  - 20 KB SRAM: 16 KB (SRAM0) + 2 KB (SRAM1) + 2KB (USB SRAM)
28  - 128 KB on-chip flash
29  - 4 KB on-chip EEPROM
30
31- External devices connected to the NXP LPC11U67 MCU:
32
33  - ASMedia ASM2364 USB-to-PCIe bridge (I2C master on port O).
34  - 6 RGB LEDs connected connected to a TI LP5030 LED controller (I2C device on
35    port 1).
36  - 1 white LED (SSD activity blinking).
37
38More information can be found here:
39
40- `LPC11UXX SoC Website`_
41- `LPC11U6X Datasheet`_
42- `LPC11U6X Reference Manual`_
43
44Supported Features
45==================
46
47All the hardware features available on the FaZe board are supported in Zephyr.
48
49+-----------+------------+-------------------------------------+
50| Interface | Controller | Driver/Component                    |
51+===========+============+=====================================+
52| NVIC      | on-chip    | nested vector interrupt controller  |
53+-----------+------------+-------------------------------------+
54| SYSTICK   | on-chip    | systick                             |
55+-----------+------------+-------------------------------------+
56| IOCON     | on-chip    | pinmux                              |
57+-----------+------------+-------------------------------------+
58| CLOCK     | on-chip    | clock and reset control             |
59+-----------+------------+-------------------------------------+
60| GPIO      | on-chip    | gpio                                |
61+-----------+------------+-------------------------------------+
62| I2C       | on-chip    | i2c master/slave controller         |
63+-----------+------------+-------------------------------------+
64| UART      | on-chip    | serial port-polling;                |
65|           |            | serial port interrupt               |
66+-----------+------------+-------------------------------------+
67| EEPROM    | on-chip    | eeprom                              |
68+-----------+------------+-------------------------------------+
69
70Connections and IOs
71===================
72
73The IOCON controller can be used to configure the LPC11U67 pins.
74
75+---------+-----------------+----------------------------+
76| Name    | Function        | Usage                      |
77+=========+=================+============================+
78| PIO0_2  | GPIO            | ASM2364 interrupt          |
79+---------+-----------------+----------------------------+
80| PIO0_4  | I2C0            | I2C0 SCL                   |
81+---------+-----------------+----------------------------+
82| PIO0_5  | I2C0            | I2C0 SDA                   |
83+---------+-----------------+----------------------------+
84| PIO0_7  | I2C1            | I2C1 SCL                   |
85+---------+-----------------+----------------------------+
86| PIO0_18 | UART            | USART0 RX                  |
87+---------+-----------------+----------------------------+
88| PIO0_19 | UART            | USART0 TX                  |
89+---------+-----------------+----------------------------+
90| PIO0_20 | GPIO            | USB sleep                  |
91+---------+-----------------+----------------------------+
92| PIO1_23 | GPIO            | SSD activity white LED     |
93+---------+-----------------+----------------------------+
94| PIO1_24 | I2C1            | I2C1 SDA                   |
95+---------+-----------------+----------------------------+
96
97Programming and Debugging
98*************************
99
100Flashing
101========
102
103The NXP LPC11U67 MCU can be flashed by connecting an external debug probe to
104the SWD port (on-board 4-pins J2 header). In the default OpenOCD configuration
105(``boards/arm/faze/support/openocd.cfg``) the ST Link interface is selected.
106You may need to replace it with the interface of your debug probe.
107
108Once the debug probe is connected to both the FaZe board and your host computer
109then you can simply run the ``west flash`` command to write a firmware image you
110built into flash.
111
112Debugging
113=========
114
115Please refer to the `Flashing`_ section and run the ``west debug`` command
116instead of ``west flash``.
117
118References
119**********
120
121- `LPC11UXX SoC Website`_
122- `LPC11U6X Datasheet`_
123- `LPC11U6X Reference Manual`_
124
125.. _LPC11UXX SoC Website:
126   https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcus/lpc1100-cortex-m0-plus-m0/scalable-entry-level-32-bit-microcontroller-mcu-based-on-arm-cortex-m0-plus-and-cortex-m0-cores:LPC11U00
127
128.. _LPC11U6X Datasheet:
129   https://www.nxp.com/docs/en/data-sheet/LPC11U6X.pdf
130
131.. _LPC11U6x Reference Manual:
132   https://www.nxp.com/webapp/Download?colCode=UM10732
133