1 /*
2 * Copyright (c) 2018 - 2019 Antmicro <www.antmicro.com>
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #ifndef __RISCV32_LITEX_VEXRISCV_SOC_H_
8 #define __RISCV32_LITEX_VEXRISCV_SOC_H_
9
10 #include "../riscv-privilege/common/soc_common.h"
11 #include <devicetree.h>
12
13 #define LITEX_SUBREG_SIZE 0x1
14 #define LITEX_SUBREG_SIZE_BIT (LITEX_SUBREG_SIZE * 8)
15
16 /* lib-c hooks required RAM defined variables */
17 #define RISCV_RAM_BASE DT_REG_ADDR(DT_INST(0, mmio_sram))
18 #define RISCV_RAM_SIZE DT_REG_SIZE(DT_INST(0, mmio_sram))
19
20 #ifndef _ASMLANGUAGE
21 /* CSR access helpers */
22
litex_read8(unsigned long addr)23 static inline unsigned char litex_read8(unsigned long addr)
24 {
25 return sys_read8(addr);
26 }
27
litex_read16(unsigned long addr)28 static inline unsigned short litex_read16(unsigned long addr)
29 {
30 return (sys_read8(addr) << 8)
31 | sys_read8(addr + 0x4);
32 }
33
litex_read32(unsigned long addr)34 static inline unsigned int litex_read32(unsigned long addr)
35 {
36 return (sys_read8(addr) << 24)
37 | (sys_read8(addr + 0x4) << 16)
38 | (sys_read8(addr + 0x8) << 8)
39 | sys_read8(addr + 0xc);
40 }
41
litex_read64(unsigned long addr)42 static inline uint64_t litex_read64(unsigned long addr)
43 {
44 return (((uint64_t)sys_read8(addr)) << 56)
45 | ((uint64_t)sys_read8(addr + 0x4) << 48)
46 | ((uint64_t)sys_read8(addr + 0x8) << 40)
47 | ((uint64_t)sys_read8(addr + 0xc) << 32)
48 | ((uint64_t)sys_read8(addr + 0x10) << 24)
49 | ((uint64_t)sys_read8(addr + 0x14) << 16)
50 | ((uint64_t)sys_read8(addr + 0x18) << 8)
51 | (uint64_t)sys_read8(addr + 0x1c);
52 }
53
litex_write8(unsigned char value,unsigned long addr)54 static inline void litex_write8(unsigned char value, unsigned long addr)
55 {
56 sys_write8(value, addr);
57 }
58
litex_write16(unsigned short value,unsigned long addr)59 static inline void litex_write16(unsigned short value, unsigned long addr)
60 {
61 sys_write8(value >> 8, addr);
62 sys_write8(value, addr + 0x4);
63 }
64
litex_write32(unsigned int value,unsigned long addr)65 static inline void litex_write32(unsigned int value, unsigned long addr)
66 {
67 sys_write8(value >> 24, addr);
68 sys_write8(value >> 16, addr + 0x4);
69 sys_write8(value >> 8, addr + 0x8);
70 sys_write8(value, addr + 0xC);
71 }
72
litex_write(volatile uint32_t * reg,uint32_t reg_size,uint32_t val)73 static inline void litex_write(volatile uint32_t *reg, uint32_t reg_size, uint32_t val)
74 {
75 uint32_t shifted_data, i;
76 volatile uint32_t *reg_addr;
77
78 for (i = 0; i < reg_size; ++i) {
79 shifted_data = val >> ((reg_size - i - 1) *
80 LITEX_SUBREG_SIZE_BIT);
81 reg_addr = ((volatile uint32_t *) reg) + i;
82 *(reg_addr) = shifted_data;
83 }
84 }
85
litex_read(volatile uint32_t * reg,uint32_t reg_size)86 static inline uint32_t litex_read(volatile uint32_t *reg, uint32_t reg_size)
87 {
88 uint32_t shifted_data, i, result = 0;
89
90 for (i = 0; i < reg_size; ++i) {
91 shifted_data = *(reg + i) << ((reg_size - i - 1) *
92 LITEX_SUBREG_SIZE_BIT);
93 result |= shifted_data;
94 }
95
96 return result;
97 }
98
99 #endif /* _ASMLANGUAGE */
100
101 #endif /* __RISCV32_LITEX_VEXRISCV_SOC_H_ */
102
