1<?xml version="1.0" encoding="UTF-8"?>
2<system name="$${FILENAME}">
3 <component
4   name="$${FILENAME}"
5   displayName="$${FILENAME}"
6   version="1.0"
7   description=""
8   tags=""
9   categories="System" />
10 <parameter name="bonusData"><![CDATA[bonusData
11{
12   element a_16550_uart_0
13   {
14      datum _sortIndex
15      {
16         value = "5";
17         type = "int";
18      }
19   }
20   element a_16550_uart_0.avalon_slave
21   {
22      datum _lockedAddress
23      {
24         value = "0";
25         type = "boolean";
26      }
27      datum baseAddress
28      {
29         value = "1048576";
30         type = "String";
31      }
32   }
33   element altpll_0
34   {
35      datum _sortIndex
36      {
37         value = "10";
38         type = "int";
39      }
40   }
41   element clk_0
42   {
43      datum _sortIndex
44      {
45         value = "0";
46         type = "int";
47      }
48   }
49   element ext_flash
50   {
51      datum _sortIndex
52      {
53         value = "11";
54         type = "int";
55      }
56   }
57   element ext_flash.avl_csr
58   {
59      datum baseAddress
60      {
61         value = "1049152";
62         type = "String";
63      }
64   }
65   element ext_flash.avl_mem
66   {
67      datum baseAddress
68      {
69         value = "134217728";
70         type = "String";
71      }
72   }
73   element i2c_0
74   {
75      datum _sortIndex
76      {
77         value = "8";
78         type = "int";
79      }
80   }
81   element i2c_0.csr
82   {
83      datum baseAddress
84      {
85         value = "1049088";
86         type = "String";
87      }
88   }
89   element jtag_uart_0
90   {
91      datum _sortIndex
92      {
93         value = "3";
94         type = "int";
95      }
96   }
97   element jtag_uart_0.avalon_jtag_slave
98   {
99      datum _lockedAddress
100      {
101         value = "1";
102         type = "boolean";
103      }
104      datum baseAddress
105      {
106         value = "2101248";
107         type = "String";
108      }
109   }
110   element led
111   {
112      datum _sortIndex
113      {
114         value = "12";
115         type = "int";
116      }
117   }
118   element led.s1
119   {
120      datum baseAddress
121      {
122         value = "1049312";
123         type = "String";
124      }
125   }
126   element msgdma_0
127   {
128      datum _sortIndex
129      {
130         value = "7";
131         type = "int";
132      }
133   }
134   element msgdma_0.csr
135   {
136      datum baseAddress
137      {
138         value = "1049280";
139         type = "String";
140      }
141   }
142   element msgdma_0.descriptor_slave
143   {
144      datum baseAddress
145      {
146         value = "1049328";
147         type = "String";
148      }
149   }
150   element nios2_gen2_0
151   {
152      datum _sortIndex
153      {
154         value = "2";
155         type = "int";
156      }
157   }
158   element nios2_gen2_0.debug_mem_slave
159   {
160      datum _lockedAddress
161      {
162         value = "1";
163         type = "boolean";
164      }
165      datum baseAddress
166      {
167         value = "2099200";
168         type = "String";
169      }
170   }
171   element onchip_flash_0
172   {
173      datum _sortIndex
174      {
175         value = "1";
176         type = "int";
177      }
178   }
179   element onchip_flash_0.csr
180   {
181      datum _lockedAddress
182      {
183         value = "1";
184         type = "boolean";
185      }
186      datum baseAddress
187      {
188         value = "2097152";
189         type = "String";
190      }
191   }
192   element onchip_flash_0.data
193   {
194      datum _lockedAddress
195      {
196         value = "1";
197         type = "boolean";
198      }
199      datum baseAddress
200      {
201         value = "0";
202         type = "String";
203      }
204   }
205   element onchip_memory2_0
206   {
207      datum _sortIndex
208      {
209         value = "4";
210         type = "int";
211      }
212   }
213   element onchip_memory2_0.s1
214   {
215      datum _lockedAddress
216      {
217         value = "1";
218         type = "boolean";
219      }
220      datum baseAddress
221      {
222         value = "4194304";
223         type = "String";
224      }
225   }
226   element spi_0
227   {
228      datum _sortIndex
229      {
230         value = "9";
231         type = "int";
232      }
233   }
234   element spi_0.spi_control_port
235   {
236      datum baseAddress
237      {
238         value = "1049216";
239         type = "String";
240      }
241   }
242   element sysid
243   {
244      datum _sortIndex
245      {
246         value = "13";
247         type = "int";
248      }
249   }
250   element sysid.control_slave
251   {
252      datum baseAddress
253      {
254         value = "1049344";
255         type = "String";
256      }
257   }
258   element timer_0
259   {
260      datum _sortIndex
261      {
262         value = "6";
263         type = "int";
264      }
265   }
266   element timer_0.s1
267   {
268      datum _lockedAddress
269      {
270         value = "0";
271         type = "boolean";
272      }
273      datum baseAddress
274      {
275         value = "1049248";
276         type = "String";
277      }
278   }
279}
280]]></parameter>
281 <parameter name="clockCrossingAdapter" value="HANDSHAKE" />
282 <parameter name="device" value="10M50DAF484C6GES" />
283 <parameter name="deviceFamily" value="MAX 10" />
284 <parameter name="deviceSpeedGrade" value="6" />
285 <parameter name="fabricMode" value="QSYS" />
286 <parameter name="generateLegacySim" value="false" />
287 <parameter name="generationId" value="0" />
288 <parameter name="globalResetBus" value="false" />
289 <parameter name="hdlLanguage" value="VERILOG" />
290 <parameter name="hideFromIPCatalog" value="false" />
291 <parameter name="lockedInterfaceDefinition" value="" />
292 <parameter name="maxAdditionalLatency" value="1" />
293 <parameter name="projectName" value="ghrd_10m50da.qpf" />
294 <parameter name="sopcBorderPoints" value="false" />
295 <parameter name="systemHash" value="0" />
296 <parameter name="testBenchDutName" value="" />
297 <parameter name="timeStamp" value="0" />
298 <parameter name="useTestBenchNamingPattern" value="false" />
299 <instanceScript></instanceScript>
300 <interface
301   name="a_16550_uart_0_rs_232_modem"
302   internal="a_16550_uart_0.RS_232_Modem"
303   type="conduit"
304   dir="end" />
305 <interface
306   name="a_16550_uart_0_rs_232_serial"
307   internal="a_16550_uart_0.RS_232_Serial"
308   type="conduit"
309   dir="end" />
310 <interface name="clk" internal="clk_0.clk_in" type="clock" dir="end" />
311 <interface
312   name="ext_flash_qspi_pins"
313   internal="ext_flash.qspi_pins"
314   type="conduit"
315   dir="end" />
316 <interface
317   name="i2c_0_i2c_serial"
318   internal="i2c_0.i2c_serial"
319   type="conduit"
320   dir="end" />
321 <interface
322   name="led_external_connection"
323   internal="led.external_connection"
324   type="conduit"
325   dir="end" />
326 <interface name="reset" internal="clk_0.clk_in_reset" type="reset" dir="end" />
327 <interface
328   name="spi_0_external"
329   internal="spi_0.external"
330   type="conduit"
331   dir="end" />
332 <module
333   name="a_16550_uart_0"
334   kind="altera_16550_uart"
335   version="17.0"
336   enabled="1">
337  <parameter name="DMA_EXTRA" value="0" />
338  <parameter name="FAMILY" value="MAX 10" />
339  <parameter name="FIFO_DEPTH" value="64" />
340  <parameter name="FIFO_HWFC" value="0" />
341  <parameter name="FIFO_MODE" value="1" />
342  <parameter name="FIFO_SWFC" value="0" />
343  <parameter name="FIFO_WATERMARK" value="0" />
344  <parameter name="MEM_BLOCK_TYPE" value="AUTO" />
345  <parameter name="clockRate" value="50000000" />
346  <parameter name="deviceFeatures">ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_REVE_SILICON 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</parameter>
347 </module>
348 <module name="altpll_0" kind="altpll" version="17.0" enabled="1">
349  <parameter name="AUTO_DEVICE_FAMILY" value="MAX 10" />
350  <parameter name="AUTO_INCLK_INTERFACE_CLOCK_RATE" value="50000000" />
351  <parameter name="AVALON_USE_SEPARATE_SYSCLK" value="NO" />
352  <parameter name="BANDWIDTH" value="" />
353  <parameter name="BANDWIDTH_TYPE" value="AUTO" />
354  <parameter name="CLK0_DIVIDE_BY" value="2" />
355  <parameter name="CLK0_DUTY_CYCLE" value="50" />
356  <parameter name="CLK0_MULTIPLY_BY" value="1" />
357  <parameter name="CLK0_PHASE_SHIFT" value="0" />
358  <parameter name="CLK1_DIVIDE_BY" value="" />
359  <parameter name="CLK1_DUTY_CYCLE" value="" />
360  <parameter name="CLK1_MULTIPLY_BY" value="" />
361  <parameter name="CLK1_PHASE_SHIFT" value="" />
362  <parameter name="CLK2_DIVIDE_BY" value="" />
363  <parameter name="CLK2_DUTY_CYCLE" value="" />
364  <parameter name="CLK2_MULTIPLY_BY" value="" />
365  <parameter name="CLK2_PHASE_SHIFT" value="" />
366  <parameter name="CLK3_DIVIDE_BY" value="" />
367  <parameter name="CLK3_DUTY_CYCLE" value="" />
368  <parameter name="CLK3_MULTIPLY_BY" value="" />
369  <parameter name="CLK3_PHASE_SHIFT" value="" />
370  <parameter name="CLK4_DIVIDE_BY" value="" />
371  <parameter name="CLK4_DUTY_CYCLE" value="" />
372  <parameter name="CLK4_MULTIPLY_BY" value="" />
373  <parameter name="CLK4_PHASE_SHIFT" value="" />
374  <parameter name="CLK5_DIVIDE_BY" value="" />
375  <parameter name="CLK5_DUTY_CYCLE" value="" />
376  <parameter name="CLK5_MULTIPLY_BY" value="" />
377  <parameter name="CLK5_PHASE_SHIFT" value="" />
378  <parameter name="CLK6_DIVIDE_BY" value="" />
379  <parameter name="CLK6_DUTY_CYCLE" value="" />
380  <parameter name="CLK6_MULTIPLY_BY" value="" />
381  <parameter name="CLK6_PHASE_SHIFT" value="" />
382  <parameter name="CLK7_DIVIDE_BY" value="" />
383  <parameter name="CLK7_DUTY_CYCLE" value="" />
384  <parameter name="CLK7_MULTIPLY_BY" value="" />
385  <parameter name="CLK7_PHASE_SHIFT" value="" />
386  <parameter name="CLK8_DIVIDE_BY" value="" />
387  <parameter name="CLK8_DUTY_CYCLE" value="" />
388  <parameter name="CLK8_MULTIPLY_BY" value="" />
389  <parameter name="CLK8_PHASE_SHIFT" value="" />
390  <parameter name="CLK9_DIVIDE_BY" value="" />
391  <parameter name="CLK9_DUTY_CYCLE" value="" />
392  <parameter name="CLK9_MULTIPLY_BY" value="" />
393  <parameter name="CLK9_PHASE_SHIFT" value="" />
394  <parameter name="COMPENSATE_CLOCK" value="CLK0" />
395  <parameter name="DOWN_SPREAD" value="" />
396  <parameter name="DPA_DIVIDER" value="" />
397  <parameter name="DPA_DIVIDE_BY" value="" />
398  <parameter name="DPA_MULTIPLY_BY" value="" />
399  <parameter name="ENABLE_SWITCH_OVER_COUNTER" value="" />
400  <parameter name="EXTCLK0_DIVIDE_BY" value="" />
401  <parameter name="EXTCLK0_DUTY_CYCLE" value="" />
402  <parameter name="EXTCLK0_MULTIPLY_BY" value="" />
403  <parameter name="EXTCLK0_PHASE_SHIFT" value="" />
404  <parameter name="EXTCLK1_DIVIDE_BY" value="" />
405  <parameter name="EXTCLK1_DUTY_CYCLE" value="" />
406  <parameter name="EXTCLK1_MULTIPLY_BY" value="" />
407  <parameter name="EXTCLK1_PHASE_SHIFT" value="" />
408  <parameter name="EXTCLK2_DIVIDE_BY" value="" />
409  <parameter name="EXTCLK2_DUTY_CYCLE" value="" />
410  <parameter name="EXTCLK2_MULTIPLY_BY" value="" />
411  <parameter name="EXTCLK2_PHASE_SHIFT" value="" />
412  <parameter name="EXTCLK3_DIVIDE_BY" value="" />
413  <parameter name="EXTCLK3_DUTY_CYCLE" value="" />
414  <parameter name="EXTCLK3_MULTIPLY_BY" value="" />
415  <parameter name="EXTCLK3_PHASE_SHIFT" value="" />
416  <parameter name="FEEDBACK_SOURCE" value="" />
417  <parameter name="GATE_LOCK_COUNTER" value="" />
418  <parameter name="GATE_LOCK_SIGNAL" value="" />
419  <parameter name="HIDDEN_CONSTANTS">CT#PORT_clk5 PORT_UNUSED CT#PORT_clk4 PORT_UNUSED CT#PORT_clk3 PORT_UNUSED CT#PORT_clk2 PORT_UNUSED CT#PORT_clk1 PORT_UNUSED CT#PORT_clk0 PORT_USED CT#CLK0_MULTIPLY_BY 1 CT#PORT_SCANWRITE PORT_UNUSED CT#PORT_SCANACLR PORT_UNUSED CT#PORT_PFDENA PORT_UNUSED CT#PORT_PLLENA PORT_UNUSED CT#PORT_SCANDATA PORT_UNUSED CT#PORT_SCANCLKENA PORT_UNUSED CT#WIDTH_CLOCK 5 CT#PORT_SCANDATAOUT PORT_UNUSED CT#LPM_TYPE altpll CT#PLL_TYPE AUTO CT#CLK0_PHASE_SHIFT 0 CT#PORT_PHASEDONE PORT_UNUSED CT#OPERATION_MODE NORMAL CT#PORT_CONFIGUPDATE PORT_UNUSED CT#COMPENSATE_CLOCK CLK0 CT#PORT_CLKSWITCH PORT_UNUSED CT#INCLK0_INPUT_FREQUENCY 20000 CT#PORT_SCANDONE PORT_UNUSED CT#PORT_CLKLOSS PORT_UNUSED CT#PORT_INCLK1 PORT_UNUSED CT#AVALON_USE_SEPARATE_SYSCLK NO CT#PORT_INCLK0 PORT_USED CT#PORT_clkena5 PORT_UNUSED CT#PORT_clkena4 PORT_UNUSED CT#PORT_clkena3 PORT_UNUSED CT#PORT_clkena2 PORT_UNUSED CT#PORT_clkena1 PORT_UNUSED CT#PORT_clkena0 PORT_UNUSED CT#PORT_ARESET PORT_UNUSED CT#BANDWIDTH_TYPE AUTO CT#INTENDED_DEVICE_FAMILY {MAX 10} CT#PORT_SCANREAD PORT_UNUSED CT#PORT_PHASESTEP PORT_UNUSED CT#PORT_SCANCLK PORT_UNUSED CT#PORT_CLKBAD1 PORT_UNUSED CT#PORT_CLKBAD0 PORT_UNUSED CT#PORT_FBIN PORT_UNUSED CT#PORT_PHASEUPDOWN PORT_UNUSED CT#PORT_extclk3 PORT_UNUSED CT#PORT_extclk2 PORT_UNUSED CT#PORT_extclk1 PORT_UNUSED CT#PORT_PHASECOUNTERSELECT PORT_UNUSED CT#PORT_extclk0 PORT_UNUSED CT#PORT_ACTIVECLOCK PORT_UNUSED CT#CLK0_DUTY_CYCLE 50 CT#CLK0_DIVIDE_BY 2 CT#PORT_LOCKED PORT_UNUSED</parameter>
420  <parameter name="HIDDEN_CUSTOM_ELABORATION">altpll_avalon_elaboration</parameter>
421  <parameter name="HIDDEN_CUSTOM_POST_EDIT">altpll_avalon_post_edit</parameter>
422  <parameter name="HIDDEN_IF_PORTS">IF#phasecounterselect {input 3} IF#locked {output 0} IF#reset {input 0} IF#clk {input 0} IF#phaseupdown {input 0} IF#scandone {output 0} IF#readdata {output 32} IF#write {input 0} IF#scanclk {input 0} IF#phasedone {output 0} IF#c4 {output 0} IF#c3 {output 0} IF#c2 {output 0} IF#address {input 2} IF#c1 {output 0} IF#c0 {output 0} IF#writedata {input 32} IF#read {input 0} IF#areset {input 0} IF#scanclkena {input 0} IF#scandataout {output 0} IF#configupdate {input 0} IF#phasestep {input 0} IF#scandata {input 0}</parameter>
423  <parameter name="HIDDEN_IS_FIRST_EDIT" value="0" />
424  <parameter name="HIDDEN_IS_NUMERIC">IN#WIDTH_CLOCK 1 IN#CLK0_DUTY_CYCLE 1 IN#PLL_TARGET_HARCOPY_CHECK 1 IN#SWITCHOVER_COUNT_EDIT 1 IN#INCLK0_INPUT_FREQUENCY 1 IN#PLL_LVDS_PLL_CHECK 1 IN#PLL_AUTOPLL_CHECK 1 IN#PLL_FASTPLL_CHECK 1 IN#PLL_ENHPLL_CHECK 1 IN#DIV_FACTOR0 1 IN#LVDS_MODE_DATA_RATE_DIRTY 1 IN#GLOCK_COUNTER_EDIT 1 IN#CLK0_DIVIDE_BY 1 IN#MULT_FACTOR0 1 IN#CLK0_MULTIPLY_BY 1 IN#USE_MIL_SPEED_GRADE 1</parameter>
425  <parameter name="HIDDEN_MF_PORTS">MF#areset 1 MF#clk 1 MF#locked 1 MF#inclk 1</parameter>
426  <parameter name="HIDDEN_PRIVATES">PT#GLOCKED_FEATURE_ENABLED 0 PT#SPREAD_FEATURE_ENABLED 0 PT#BANDWIDTH_FREQ_UNIT MHz PT#CUR_DEDICATED_CLK c0 PT#INCLK0_FREQ_EDIT 50.000 PT#BANDWIDTH_PRESET Low PT#PLL_LVDS_PLL_CHECK 0 PT#BANDWIDTH_USE_PRESET 0 PT#AVALON_USE_SEPARATE_SYSCLK NO PT#PLL_ENHPLL_CHECK 0 PT#OUTPUT_FREQ_UNIT0 MHz PT#PHASE_RECONFIG_FEATURE_ENABLED 1 PT#CREATE_CLKBAD_CHECK 0 PT#CLKSWITCH_CHECK 0 PT#INCLK1_FREQ_EDIT 100.000 PT#NORMAL_MODE_RADIO 1 PT#SRC_SYNCH_COMP_RADIO 0 PT#PLL_ARESET_CHECK 0 PT#LONG_SCAN_RADIO 1 PT#SCAN_FEATURE_ENABLED 1 PT#PHASE_RECONFIG_INPUTS_CHECK 0 PT#USE_CLK0 1 PT#PRIMARY_CLK_COMBO inclk0 PT#BANDWIDTH 1.000 PT#GLOCKED_COUNTER_EDIT_CHANGED 1 PT#PLL_FASTPLL_CHECK 0 PT#SPREAD_FREQ_UNIT KHz PT#PLL_AUTOPLL_CHECK 1 PT#LVDS_PHASE_SHIFT_UNIT0 deg PT#SWITCHOVER_FEATURE_ENABLED 0 PT#MIG_DEVICE_SPEED_GRADE Any PT#OUTPUT_FREQ_MODE0 1 PT#BANDWIDTH_FEATURE_ENABLED 1 PT#INCLK0_FREQ_UNIT_COMBO MHz PT#ZERO_DELAY_RADIO 0 PT#OUTPUT_FREQ0 25.00000000 PT#SHORT_SCAN_RADIO 0 PT#LVDS_MODE_DATA_RATE_DIRTY 0 PT#CUR_FBIN_CLK c0 PT#PLL_ADVANCED_PARAM_CHECK 0 PT#CLKBAD_SWITCHOVER_CHECK 0 PT#PHASE_SHIFT_STEP_ENABLED_CHECK 0 PT#DEVICE_SPEED_GRADE Any PT#PLL_FBMIMIC_CHECK 0 PT#LVDS_MODE_DATA_RATE {Not Available} PT#LOCKED_OUTPUT_CHECK 0 PT#SPREAD_PERCENT 0.500 PT#PHASE_SHIFT0 0.00000000 PT#DIV_FACTOR0 1 PT#CNX_NO_COMPENSATE_RADIO 0 PT#USE_CLKENA0 0 PT#CREATE_INCLK1_CHECK 0 PT#GLOCK_COUNTER_EDIT 1048575 PT#INCLK1_FREQ_UNIT_COMBO MHz PT#EFF_OUTPUT_FREQ_VALUE0 25.000000 PT#SPREAD_FREQ 50.000 PT#USE_MIL_SPEED_GRADE 0 PT#EXPLICIT_SWITCHOVER_COUNTER 0 PT#STICKY_CLK4 0 PT#STICKY_CLK3 0 PT#STICKY_CLK2 0 PT#STICKY_CLK1 0 PT#STICKY_CLK0 1 PT#EXT_FEEDBACK_RADIO 0 PT#MIRROR_CLK0 0 PT#SWITCHOVER_COUNT_EDIT 1 PT#SELF_RESET_LOCK_LOSS 0 PT#PLL_PFDENA_CHECK 0 PT#INT_FEEDBACK__MODE_RADIO 1 PT#INCLK1_FREQ_EDIT_CHANGED 1 PT#CLKLOSS_CHECK 0 PT#SYNTH_WRAPPER_GEN_POSTFIX 0 PT#PHASE_SHIFT_UNIT0 deg PT#BANDWIDTH_USE_AUTO 1 PT#HAS_MANUAL_SWITCHOVER 1 PT#MULT_FACTOR0 1 PT#SPREAD_USE 0 PT#GLOCKED_MODE_CHECK 0 PT#SACN_INPUTS_CHECK 0 PT#DUTY_CYCLE0 50.00000000 PT#INTENDED_DEVICE_FAMILY {MAX 10} PT#PLL_TARGET_HARCOPY_CHECK 0 PT#INCLK1_FREQ_UNIT_CHANGED 1 PT#RECONFIG_FILE ALTPLL1509345238202295.mif PT#ACTIVECLK_CHECK 0</parameter>
427  <parameter name="HIDDEN_USED_PORTS">UP#locked used UP#c0 used UP#areset used UP#inclk0 used</parameter>
428  <parameter name="INCLK0_INPUT_FREQUENCY" value="20000" />
429  <parameter name="INCLK1_INPUT_FREQUENCY" value="" />
430  <parameter name="INTENDED_DEVICE_FAMILY" value="MAX 10" />
431  <parameter name="INVALID_LOCK_MULTIPLIER" value="" />
432  <parameter name="LOCK_HIGH" value="" />
433  <parameter name="LOCK_LOW" value="" />
434  <parameter name="OPERATION_MODE" value="NORMAL" />
435  <parameter name="PLL_TYPE" value="AUTO" />
436  <parameter name="PORT_ACTIVECLOCK" value="PORT_UNUSED" />
437  <parameter name="PORT_ARESET" value="PORT_UNUSED" />
438  <parameter name="PORT_CLKBAD0" value="PORT_UNUSED" />
439  <parameter name="PORT_CLKBAD1" value="PORT_UNUSED" />
440  <parameter name="PORT_CLKLOSS" value="PORT_UNUSED" />
441  <parameter name="PORT_CLKSWITCH" value="PORT_UNUSED" />
442  <parameter name="PORT_CONFIGUPDATE" value="PORT_UNUSED" />
443  <parameter name="PORT_ENABLE0" value="" />
444  <parameter name="PORT_ENABLE1" value="" />
445  <parameter name="PORT_FBIN" value="PORT_UNUSED" />
446  <parameter name="PORT_FBOUT" value="" />
447  <parameter name="PORT_INCLK0" value="PORT_USED" />
448  <parameter name="PORT_INCLK1" value="PORT_UNUSED" />
449  <parameter name="PORT_LOCKED" value="PORT_UNUSED" />
450  <parameter name="PORT_PFDENA" value="PORT_UNUSED" />
451  <parameter name="PORT_PHASECOUNTERSELECT" value="PORT_UNUSED" />
452  <parameter name="PORT_PHASEDONE" value="PORT_UNUSED" />
453  <parameter name="PORT_PHASESTEP" value="PORT_UNUSED" />
454  <parameter name="PORT_PHASEUPDOWN" value="PORT_UNUSED" />
455  <parameter name="PORT_PLLENA" value="PORT_UNUSED" />
456  <parameter name="PORT_SCANACLR" value="PORT_UNUSED" />
457  <parameter name="PORT_SCANCLK" value="PORT_UNUSED" />
458  <parameter name="PORT_SCANCLKENA" value="PORT_UNUSED" />
459  <parameter name="PORT_SCANDATA" value="PORT_UNUSED" />
460  <parameter name="PORT_SCANDATAOUT" value="PORT_UNUSED" />
461  <parameter name="PORT_SCANDONE" value="PORT_UNUSED" />
462  <parameter name="PORT_SCANREAD" value="PORT_UNUSED" />
463  <parameter name="PORT_SCANWRITE" value="PORT_UNUSED" />
464  <parameter name="PORT_SCLKOUT0" value="" />
465  <parameter name="PORT_SCLKOUT1" value="" />
466  <parameter name="PORT_VCOOVERRANGE" value="" />
467  <parameter name="PORT_VCOUNDERRANGE" value="" />
468  <parameter name="PORT_clk0" value="PORT_USED" />
469  <parameter name="PORT_clk1" value="PORT_UNUSED" />
470  <parameter name="PORT_clk2" value="PORT_UNUSED" />
471  <parameter name="PORT_clk3" value="PORT_UNUSED" />
472  <parameter name="PORT_clk4" value="PORT_UNUSED" />
473  <parameter name="PORT_clk5" value="PORT_UNUSED" />
474  <parameter name="PORT_clk6" value="" />
475  <parameter name="PORT_clk7" value="" />
476  <parameter name="PORT_clk8" value="" />
477  <parameter name="PORT_clk9" value="" />
478  <parameter name="PORT_clkena0" value="PORT_UNUSED" />
479  <parameter name="PORT_clkena1" value="PORT_UNUSED" />
480  <parameter name="PORT_clkena2" value="PORT_UNUSED" />
481  <parameter name="PORT_clkena3" value="PORT_UNUSED" />
482  <parameter name="PORT_clkena4" value="PORT_UNUSED" />
483  <parameter name="PORT_clkena5" value="PORT_UNUSED" />
484  <parameter name="PORT_extclk0" value="PORT_UNUSED" />
485  <parameter name="PORT_extclk1" value="PORT_UNUSED" />
486  <parameter name="PORT_extclk2" value="PORT_UNUSED" />
487  <parameter name="PORT_extclk3" value="PORT_UNUSED" />
488  <parameter name="PORT_extclkena0" value="" />
489  <parameter name="PORT_extclkena1" value="" />
490  <parameter name="PORT_extclkena2" value="" />
491  <parameter name="PORT_extclkena3" value="" />
492  <parameter name="PRIMARY_CLOCK" value="" />
493  <parameter name="QUALIFY_CONF_DONE" value="" />
494  <parameter name="SCAN_CHAIN" value="" />
495  <parameter name="SCAN_CHAIN_MIF_FILE" value="" />
496  <parameter name="SCLKOUT0_PHASE_SHIFT" value="" />
497  <parameter name="SCLKOUT1_PHASE_SHIFT" value="" />
498  <parameter name="SELF_RESET_ON_GATED_LOSS_LOCK" value="" />
499  <parameter name="SELF_RESET_ON_LOSS_LOCK" value="" />
500  <parameter name="SKIP_VCO" value="" />
501  <parameter name="SPREAD_FREQUENCY" value="" />
502  <parameter name="SWITCH_OVER_COUNTER" value="" />
503  <parameter name="SWITCH_OVER_ON_GATED_LOCK" value="" />
504  <parameter name="SWITCH_OVER_ON_LOSSCLK" value="" />
505  <parameter name="SWITCH_OVER_TYPE" value="" />
506  <parameter name="USING_FBMIMICBIDIR_PORT" value="" />
507  <parameter name="VALID_LOCK_MULTIPLIER" value="" />
508  <parameter name="VCO_DIVIDE_BY" value="" />
509  <parameter name="VCO_FREQUENCY_CONTROL" value="" />
510  <parameter name="VCO_MULTIPLY_BY" value="" />
511  <parameter name="VCO_PHASE_SHIFT_STEP" value="" />
512  <parameter name="WIDTH_CLOCK" value="5" />
513  <parameter name="WIDTH_PHASECOUNTERSELECT" value="" />
514 </module>
515 <module name="clk_0" kind="clock_source" version="17.0" enabled="1">
516  <parameter name="clockFrequency" value="50000000" />
517  <parameter name="clockFrequencyKnown" value="true" />
518  <parameter name="inputClockFrequency" value="0" />
519  <parameter name="resetSynchronousEdges" value="NONE" />
520 </module>
521 <module
522   name="ext_flash"
523   kind="altera_generic_quad_spi_controller2"
524   version="17.0"
525   enabled="1">
526  <parameter name="AUTO_DEVICE" value="10M50DAF484C6GES" />
527  <parameter name="AUTO_DEVICE_SPEEDGRADE" value="6" />
528  <parameter name="CHIP_SELS" value="1" />
529  <parameter name="DEVICE_FAMILY" value="MAX 10" />
530  <parameter name="FLASH_TYPE" value="Micron512" />
531  <parameter name="IO_MODE" value="QUAD" />
532  <parameter name="clkFreq" value="25000000" />
533  <parameter name="deviceFeaturesSystemInfo">ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_REVE_SILICON 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</parameter>
534 </module>
535 <module name="i2c_0" kind="altera_avalon_i2c" version="17.0" enabled="1">
536  <parameter name="FIFO_DEPTH" value="16" />
537  <parameter name="USE_AV_ST" value="0" />
538  <parameter name="clockRate" value="50000000" />
539 </module>
540 <module
541   name="jtag_uart_0"
542   kind="altera_avalon_jtag_uart"
543   version="17.0"
544   enabled="1">
545  <parameter name="allowMultipleConnections" value="false" />
546  <parameter name="avalonSpec" value="2.0" />
547  <parameter name="clkFreq" value="50000000" />
548  <parameter name="hubInstanceID" value="0" />
549  <parameter name="readBufferDepth" value="64" />
550  <parameter name="readIRQThreshold" value="8" />
551  <parameter name="simInputCharacterStream" value="" />
552  <parameter name="simInteractiveOptions">NO_INTERACTIVE_WINDOWS</parameter>
553  <parameter name="useRegistersForReadBuffer" value="true" />
554  <parameter name="useRegistersForWriteBuffer" value="true" />
555  <parameter name="useRelativePathForSimFile" value="false" />
556  <parameter name="writeBufferDepth" value="64" />
557  <parameter name="writeIRQThreshold" value="8" />
558 </module>
559 <module name="led" kind="altera_avalon_pio" version="17.0" enabled="1">
560  <parameter name="bitClearingEdgeCapReg" value="false" />
561  <parameter name="bitModifyingOutReg" value="false" />
562  <parameter name="captureEdge" value="false" />
563  <parameter name="clockRate" value="50000000" />
564  <parameter name="direction" value="Output" />
565  <parameter name="edgeType" value="RISING" />
566  <parameter name="generateIRQ" value="false" />
567  <parameter name="irqType" value="LEVEL" />
568  <parameter name="resetValue" value="0" />
569  <parameter name="simDoTestBenchWiring" value="false" />
570  <parameter name="simDrivenValue" value="0" />
571  <parameter name="width" value="4" />
572 </module>
573 <module name="msgdma_0" kind="altera_msgdma" version="17.0" enabled="1">
574  <parameter name="AUTO_DESCRIPTOR_READ_MASTER_ADDRESS_MAP" value="" />
575  <parameter
576     name="AUTO_DESCRIPTOR_READ_MASTER_ADDRESS_WIDTH"
577     value="AddressWidth = -1" />
578  <parameter name="AUTO_DESCRIPTOR_WRITE_MASTER_ADDRESS_MAP" value="" />
579  <parameter
580     name="AUTO_DESCRIPTOR_WRITE_MASTER_ADDRESS_WIDTH"
581     value="AddressWidth = -1" />
582  <parameter name="AUTO_DEVICE" value="10M50DAF484C6GES" />
583  <parameter name="AUTO_DEVICE_FAMILY" value="MAX 10" />
584  <parameter name="AUTO_DEVICE_SPEEDGRADE" value="6" />
585  <parameter name="AUTO_MM_READ_ADDRESS_MAP"><![CDATA[<address-map><slave name='onchip_memory2_0.s1' start='0x400000' end='0x420000' /></address-map>]]></parameter>
586  <parameter name="AUTO_MM_READ_ADDRESS_WIDTH" value="AddressWidth = 23" />
587  <parameter name="AUTO_MM_WRITE_ADDRESS_MAP"><![CDATA[<address-map><slave name='onchip_memory2_0.s1' start='0x400000' end='0x420000' /></address-map>]]></parameter>
588  <parameter name="AUTO_MM_WRITE_ADDRESS_WIDTH" value="AddressWidth = 23" />
589  <parameter name="BURST_ENABLE" value="1" />
590  <parameter name="BURST_WRAPPING_SUPPORT" value="1" />
591  <parameter name="CHANNEL_ENABLE" value="0" />
592  <parameter name="CHANNEL_WIDTH" value="8" />
593  <parameter name="DATA_FIFO_DEPTH" value="32" />
594  <parameter name="DATA_WIDTH" value="32" />
595  <parameter name="DESCRIPTOR_FIFO_DEPTH" value="128" />
596  <parameter name="ENHANCED_FEATURES" value="0" />
597  <parameter name="ERROR_ENABLE" value="0" />
598  <parameter name="ERROR_WIDTH" value="8" />
599  <parameter name="EXPOSE_ST_PORT" value="0" />
600  <parameter name="FIX_ADDRESS_WIDTH" value="32" />
601  <parameter name="MAX_BURST_COUNT" value="2" />
602  <parameter name="MAX_BYTE" value="1024" />
603  <parameter name="MAX_STRIDE" value="1" />
604  <parameter name="MODE" value="0" />
605  <parameter name="PACKET_ENABLE" value="0" />
606  <parameter name="PREFETCHER_DATA_WIDTH" value="32" />
607  <parameter name="PREFETCHER_ENABLE" value="0" />
608  <parameter name="PREFETCHER_MAX_READ_BURST_COUNT" value="2" />
609  <parameter name="PREFETCHER_READ_BURST_ENABLE" value="0" />
610  <parameter name="PROGRAMMABLE_BURST_ENABLE" value="0" />
611  <parameter name="RESPONSE_PORT" value="2" />
612  <parameter name="STRIDE_ENABLE" value="0" />
613  <parameter name="TRANSFER_TYPE" value="Aligned Accesses" />
614  <parameter name="USE_FIX_ADDRESS_WIDTH" value="0" />
615 </module>
616 <module
617   name="nios2_gen2_0"
618   kind="altera_nios2_gen2"
619   version="17.0"
620   enabled="1">
621  <parameter name="AUTO_CLK_CLOCK_DOMAIN" value="1" />
622  <parameter name="AUTO_CLK_RESET_DOMAIN" value="1" />
623  <parameter name="AUTO_DEVICE" value="10M50DAF484C6GES" />
624  <parameter name="AUTO_DEVICE_SPEEDGRADE" value="6" />
625  <parameter name="bht_ramBlockType" value="Automatic" />
626  <parameter name="breakOffset" value="32" />
627  <parameter name="breakSlave" value="None" />
628  <parameter name="cdx_enabled" value="false" />
629  <parameter name="clockFrequency" value="50000000" />
630  <parameter name="cpuArchRev" value="1" />
631  <parameter name="cpuID" value="0" />
632  <parameter name="cpuReset" value="false" />
633  <parameter name="customInstSlavesSystemInfo" value="&lt;info/&gt;" />
634  <parameter name="customInstSlavesSystemInfo_nios_a" value="&lt;info/&gt;" />
635  <parameter name="customInstSlavesSystemInfo_nios_b" value="&lt;info/&gt;" />
636  <parameter name="customInstSlavesSystemInfo_nios_c" value="&lt;info/&gt;" />
637  <parameter name="dataAddrWidth" value="28" />
638  <parameter name="dataMasterHighPerformanceAddrWidth" value="1" />
639  <parameter name="dataMasterHighPerformanceMapParam" value="" />
640  <parameter name="dataSlaveMapParam"><![CDATA[<address-map><slave name='onchip_flash_0.data' start='0x0' end='0xB8000' type='altera_onchip_flash.data' /><slave name='a_16550_uart_0.avalon_slave' start='0x100000' end='0x100200' type='altera_16550_uart.avalon_slave' /><slave name='i2c_0.csr' start='0x100200' end='0x100240' type='altera_avalon_i2c.csr' /><slave name='ext_flash.avl_csr' start='0x100240' end='0x100280' type='altera_generic_quad_spi_controller2.avl_csr' /><slave name='spi_0.spi_control_port' start='0x100280' end='0x1002A0' type='altera_avalon_spi.spi_control_port' /><slave name='timer_0.s1' start='0x1002A0' end='0x1002C0' type='altera_avalon_timer.s1' /><slave name='msgdma_0.csr' start='0x1002C0' end='0x1002E0' type='altera_msgdma.csr' /><slave name='led.s1' start='0x1002E0' end='0x1002F0' type='altera_avalon_pio.s1' /><slave name='msgdma_0.descriptor_slave' start='0x1002F0' end='0x100300' type='altera_msgdma.descriptor_slave' /><slave name='sysid.control_slave' start='0x100300' end='0x100308' type='altera_avalon_sysid_qsys.control_slave' /><slave name='onchip_flash_0.csr' start='0x200000' end='0x200008' type='altera_onchip_flash.csr' /><slave name='nios2_gen2_0.debug_mem_slave' start='0x200800' end='0x201000' type='altera_nios2_gen2.debug_mem_slave' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x201000' end='0x201008' type='altera_avalon_jtag_uart.avalon_jtag_slave' /><slave name='onchip_memory2_0.s1' start='0x400000' end='0x420000' type='altera_avalon_onchip_memory2.s1' /><slave name='ext_flash.avl_mem' start='0x8000000' end='0xC000000' type='altera_generic_quad_spi_controller2.avl_mem' /></address-map>]]></parameter>
641  <parameter name="data_master_high_performance_paddr_base" value="0" />
642  <parameter name="data_master_high_performance_paddr_size" value="0" />
643  <parameter name="data_master_paddr_base" value="0" />
644  <parameter name="data_master_paddr_size" value="0" />
645  <parameter name="dcache_bursts" value="false" />
646  <parameter name="dcache_numTCDM" value="0" />
647  <parameter name="dcache_ramBlockType" value="Automatic" />
648  <parameter name="dcache_size" value="2048" />
649  <parameter name="dcache_tagramBlockType" value="Automatic" />
650  <parameter name="dcache_victim_buf_impl" value="ram" />
651  <parameter name="debug_OCIOnchipTrace" value="_128" />
652  <parameter name="debug_assignJtagInstanceID" value="false" />
653  <parameter name="debug_datatrigger" value="4" />
654  <parameter name="debug_debugReqSignals" value="false" />
655  <parameter name="debug_enabled" value="true" />
656  <parameter name="debug_hwbreakpoint" value="4" />
657  <parameter name="debug_jtagInstanceID" value="0" />
658  <parameter name="debug_traceStorage" value="onchip_trace" />
659  <parameter name="debug_traceType" value="none" />
660  <parameter name="debug_triggerArming" value="true" />
661  <parameter name="deviceFamilyName" value="MAX 10" />
662  <parameter name="deviceFeaturesSystemInfo">ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_REVE_SILICON 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</parameter>
663  <parameter name="dividerType" value="srt2" />
664  <parameter name="exceptionOffset" value="32" />
665  <parameter name="exceptionSlave" value="onchip_memory2_0.s1" />
666  <parameter name="faAddrWidth" value="1" />
667  <parameter name="faSlaveMapParam" value="" />
668  <parameter name="fa_cache_line" value="2" />
669  <parameter name="fa_cache_linesize" value="0" />
670  <parameter name="flash_instruction_master_paddr_base" value="0" />
671  <parameter name="flash_instruction_master_paddr_size" value="0" />
672  <parameter name="icache_burstType" value="None" />
673  <parameter name="icache_numTCIM" value="0" />
674  <parameter name="icache_ramBlockType" value="Automatic" />
675  <parameter name="icache_size" value="4096" />
676  <parameter name="icache_tagramBlockType" value="Automatic" />
677  <parameter name="impl" value="Fast" />
678  <parameter name="instAddrWidth" value="28" />
679  <parameter name="instSlaveMapParam"><![CDATA[<address-map><slave name='onchip_flash_0.data' start='0x0' end='0xB8000' type='altera_onchip_flash.data' /><slave name='nios2_gen2_0.debug_mem_slave' start='0x200800' end='0x201000' type='altera_nios2_gen2.debug_mem_slave' /><slave name='onchip_memory2_0.s1' start='0x400000' end='0x420000' type='altera_avalon_onchip_memory2.s1' /><slave name='ext_flash.avl_mem' start='0x8000000' end='0xC000000' type='altera_generic_quad_spi_controller2.avl_mem' /></address-map>]]></parameter>
680  <parameter name="instructionMasterHighPerformanceAddrWidth" value="1" />
681  <parameter name="instructionMasterHighPerformanceMapParam" value="" />
682  <parameter name="instruction_master_high_performance_paddr_base" value="0" />
683  <parameter name="instruction_master_high_performance_paddr_size" value="0" />
684  <parameter name="instruction_master_paddr_base" value="0" />
685  <parameter name="instruction_master_paddr_size" value="0" />
686  <parameter name="internalIrqMaskSystemInfo" value="127" />
687  <parameter name="io_regionbase" value="0" />
688  <parameter name="io_regionsize" value="0" />
689  <parameter name="master_addr_map" value="false" />
690  <parameter name="mmu_TLBMissExcOffset" value="0" />
691  <parameter name="mmu_TLBMissExcSlave" value="None" />
692  <parameter name="mmu_autoAssignTlbPtrSz" value="true" />
693  <parameter name="mmu_enabled" value="false" />
694  <parameter name="mmu_processIDNumBits" value="8" />
695  <parameter name="mmu_ramBlockType" value="Automatic" />
696  <parameter name="mmu_tlbNumWays" value="16" />
697  <parameter name="mmu_tlbPtrSz" value="7" />
698  <parameter name="mmu_udtlbNumEntries" value="6" />
699  <parameter name="mmu_uitlbNumEntries" value="4" />
700  <parameter name="mpu_enabled" value="false" />
701  <parameter name="mpu_minDataRegionSize" value="12" />
702  <parameter name="mpu_minInstRegionSize" value="12" />
703  <parameter name="mpu_numOfDataRegion" value="8" />
704  <parameter name="mpu_numOfInstRegion" value="8" />
705  <parameter name="mpu_useLimit" value="false" />
706  <parameter name="mpx_enabled" value="false" />
707  <parameter name="mul_32_impl" value="2" />
708  <parameter name="mul_64_impl" value="1" />
709  <parameter name="mul_shift_choice" value="0" />
710  <parameter name="ocimem_ramBlockType" value="Automatic" />
711  <parameter name="ocimem_ramInit" value="false" />
712  <parameter name="regfile_ramBlockType" value="Automatic" />
713  <parameter name="register_file_por" value="false" />
714  <parameter name="resetOffset" value="0" />
715  <parameter name="resetSlave" value="onchip_flash_0.data" />
716  <parameter name="resetrequest_enabled" value="true" />
717  <parameter name="setting_HBreakTest" value="false" />
718  <parameter name="setting_HDLSimCachesCleared" value="true" />
719  <parameter name="setting_activateMonitors" value="true" />
720  <parameter name="setting_activateTestEndChecker" value="false" />
721  <parameter name="setting_activateTrace" value="false" />
722  <parameter name="setting_allow_break_inst" value="false" />
723  <parameter name="setting_alwaysEncrypt" value="true" />
724  <parameter name="setting_asic_add_scan_mode_input" value="false" />
725  <parameter name="setting_asic_enabled" value="false" />
726  <parameter name="setting_asic_synopsys_translate_on_off" value="false" />
727  <parameter name="setting_asic_third_party_synthesis" value="false" />
728  <parameter name="setting_avalonDebugPortPresent" value="false" />
729  <parameter name="setting_bhtPtrSz" value="8" />
730  <parameter name="setting_bigEndian" value="false" />
731  <parameter name="setting_branchpredictiontype" value="Dynamic" />
732  <parameter name="setting_breakslaveoveride" value="false" />
733  <parameter name="setting_clearXBitsLDNonBypass" value="true" />
734  <parameter name="setting_dc_ecc_present" value="true" />
735  <parameter name="setting_disable_tmr_inj" value="false" />
736  <parameter name="setting_disableocitrace" value="false" />
737  <parameter name="setting_dtcm_ecc_present" value="true" />
738  <parameter name="setting_ecc_present" value="false" />
739  <parameter name="setting_ecc_sim_test_ports" value="false" />
740  <parameter name="setting_exportHostDebugPort" value="false" />
741  <parameter name="setting_exportPCB" value="false" />
742  <parameter name="setting_export_large_RAMs" value="false" />
743  <parameter name="setting_exportdebuginfo" value="false" />
744  <parameter name="setting_exportvectors" value="false" />
745  <parameter name="setting_fast_register_read" value="false" />
746  <parameter name="setting_ic_ecc_present" value="true" />
747  <parameter name="setting_interruptControllerType" value="Internal" />
748  <parameter name="setting_itcm_ecc_present" value="true" />
749  <parameter name="setting_mmu_ecc_present" value="true" />
750  <parameter name="setting_oci_export_jtag_signals" value="false" />
751  <parameter name="setting_oci_version" value="1" />
752  <parameter name="setting_preciseIllegalMemAccessException" value="false" />
753  <parameter name="setting_removeRAMinit" value="false" />
754  <parameter name="setting_rf_ecc_present" value="true" />
755  <parameter name="setting_shadowRegisterSets" value="0" />
756  <parameter name="setting_showInternalSettings" value="false" />
757  <parameter name="setting_showUnpublishedSettings" value="false" />
758  <parameter name="setting_support31bitdcachebypass" value="true" />
759  <parameter name="setting_tmr_output_disable" value="false" />
760  <parameter name="setting_usedesignware" value="false" />
761  <parameter name="shift_rot_impl" value="1" />
762  <parameter name="tightlyCoupledDataMaster0AddrWidth" value="1" />
763  <parameter name="tightlyCoupledDataMaster0MapParam" value="" />
764  <parameter name="tightlyCoupledDataMaster1AddrWidth" value="1" />
765  <parameter name="tightlyCoupledDataMaster1MapParam" value="" />
766  <parameter name="tightlyCoupledDataMaster2AddrWidth" value="1" />
767  <parameter name="tightlyCoupledDataMaster2MapParam" value="" />
768  <parameter name="tightlyCoupledDataMaster3AddrWidth" value="1" />
769  <parameter name="tightlyCoupledDataMaster3MapParam" value="" />
770  <parameter name="tightlyCoupledInstructionMaster0AddrWidth" value="1" />
771  <parameter name="tightlyCoupledInstructionMaster0MapParam" value="" />
772  <parameter name="tightlyCoupledInstructionMaster1AddrWidth" value="1" />
773  <parameter name="tightlyCoupledInstructionMaster1MapParam" value="" />
774  <parameter name="tightlyCoupledInstructionMaster2AddrWidth" value="1" />
775  <parameter name="tightlyCoupledInstructionMaster2MapParam" value="" />
776  <parameter name="tightlyCoupledInstructionMaster3AddrWidth" value="1" />
777  <parameter name="tightlyCoupledInstructionMaster3MapParam" value="" />
778  <parameter name="tightly_coupled_data_master_0_paddr_base" value="0" />
779  <parameter name="tightly_coupled_data_master_0_paddr_size" value="0" />
780  <parameter name="tightly_coupled_data_master_1_paddr_base" value="0" />
781  <parameter name="tightly_coupled_data_master_1_paddr_size" value="0" />
782  <parameter name="tightly_coupled_data_master_2_paddr_base" value="0" />
783  <parameter name="tightly_coupled_data_master_2_paddr_size" value="0" />
784  <parameter name="tightly_coupled_data_master_3_paddr_base" value="0" />
785  <parameter name="tightly_coupled_data_master_3_paddr_size" value="0" />
786  <parameter name="tightly_coupled_instruction_master_0_paddr_base" value="0" />
787  <parameter name="tightly_coupled_instruction_master_0_paddr_size" value="0" />
788  <parameter name="tightly_coupled_instruction_master_1_paddr_base" value="0" />
789  <parameter name="tightly_coupled_instruction_master_1_paddr_size" value="0" />
790  <parameter name="tightly_coupled_instruction_master_2_paddr_base" value="0" />
791  <parameter name="tightly_coupled_instruction_master_2_paddr_size" value="0" />
792  <parameter name="tightly_coupled_instruction_master_3_paddr_base" value="0" />
793  <parameter name="tightly_coupled_instruction_master_3_paddr_size" value="0" />
794  <parameter name="tmr_enabled" value="false" />
795  <parameter name="tracefilename" value="" />
796  <parameter name="userDefinedSettings" value="" />
797 </module>
798 <module
799   name="onchip_flash_0"
800   kind="altera_onchip_flash"
801   version="17.0"
802   enabled="1">
803  <parameter name="AUTO_CLOCK_RATE" value="50000000" />
804  <parameter name="CLOCK_FREQUENCY" value="116.0" />
805  <parameter name="CONFIGURATION_MODE">Single Compressed Image</parameter>
806  <parameter name="CONFIGURATION_SCHEME">Internal Configuration</parameter>
807  <parameter name="DATA_INTERFACE" value="Parallel" />
808  <parameter name="DEVICE_FAMILY" value="MAX 10" />
809  <parameter name="PART_NAME" value="10M50DAF484C6GES" />
810  <parameter name="READ_BURST_COUNT" value="8" />
811  <parameter name="READ_BURST_MODE" value="Incrementing" />
812  <parameter name="SECTOR_ACCESS_MODE">Read and write,Read and write,Read and write,Read and write,Hidden</parameter>
813  <parameter name="autoInitializationFileName">$${FILENAME}_onchip_flash_0</parameter>
814  <parameter name="initFlashContent" value="false" />
815  <parameter name="initializationFileName">altera_onchip_flash.hex</parameter>
816  <parameter name="initializationFileNameForSim">altera_onchip_flash.dat</parameter>
817  <parameter name="useNonDefaultInitFile" value="false" />
818 </module>
819 <module
820   name="onchip_memory2_0"
821   kind="altera_avalon_onchip_memory2"
822   version="17.0"
823   enabled="1">
824  <parameter name="allowInSystemMemoryContentEditor" value="false" />
825  <parameter name="autoInitializationFileName">$${FILENAME}_onchip_memory2_0</parameter>
826  <parameter name="blockType" value="AUTO" />
827  <parameter name="copyInitFile" value="false" />
828  <parameter name="dataWidth" value="32" />
829  <parameter name="dataWidth2" value="32" />
830  <parameter name="deviceFamily" value="MAX 10" />
831  <parameter name="deviceFeatures">ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_REVE_SILICON 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</parameter>
832  <parameter name="dualPort" value="false" />
833  <parameter name="ecc_enabled" value="false" />
834  <parameter name="enPRInitMode" value="false" />
835  <parameter name="enableDiffWidth" value="false" />
836  <parameter name="initMemContent" value="false" />
837  <parameter name="initializationFileName" value="onchip_mem.hex" />
838  <parameter name="instanceID" value="NONE" />
839  <parameter name="memorySize" value="131072" />
840  <parameter name="readDuringWriteMode" value="DONT_CARE" />
841  <parameter name="resetrequest_enabled" value="true" />
842  <parameter name="simAllowMRAMContentsFile" value="false" />
843  <parameter name="simMemInitOnlyFilename" value="0" />
844  <parameter name="singleClockOperation" value="false" />
845  <parameter name="slave1Latency" value="1" />
846  <parameter name="slave2Latency" value="1" />
847  <parameter name="useNonDefaultInitFile" value="false" />
848  <parameter name="useShallowMemBlocks" value="false" />
849  <parameter name="writable" value="true" />
850 </module>
851 <module name="spi_0" kind="altera_avalon_spi" version="17.0" enabled="1">
852  <parameter name="avalonSpec" value="2.0" />
853  <parameter name="clockPhase" value="1" />
854  <parameter name="clockPolarity" value="0" />
855  <parameter name="dataWidth" value="8" />
856  <parameter name="disableAvalonFlowControl" value="false" />
857  <parameter name="inputClockRate" value="50000000" />
858  <parameter name="insertDelayBetweenSlaveSelectAndSClk" value="false" />
859  <parameter name="insertSync" value="false" />
860  <parameter name="lsbOrderedFirst" value="false" />
861  <parameter name="masterSPI" value="true" />
862  <parameter name="numberOfSlaves" value="1" />
863  <parameter name="syncRegDepth" value="2" />
864  <parameter name="targetClockRate" value="128000" />
865  <parameter name="targetSlaveSelectToSClkDelay" value="0.0" />
866 </module>
867 <module
868   name="sysid"
869   kind="altera_avalon_sysid_qsys"
870   version="17.0"
871   enabled="1">
872  <parameter name="id" value="0" />
873 </module>
874 <module name="timer_0" kind="altera_avalon_timer" version="17.0" enabled="1">
875  <parameter name="alwaysRun" value="false" />
876  <parameter name="counterSize" value="32" />
877  <parameter name="fixedPeriod" value="false" />
878  <parameter name="period" value="1" />
879  <parameter name="periodUnits" value="MSEC" />
880  <parameter name="resetOutput" value="false" />
881  <parameter name="snapshot" value="true" />
882  <parameter name="systemFrequency" value="50000000" />
883  <parameter name="timeoutPulseOutput" value="false" />
884  <parameter name="watchdogPulse" value="2" />
885 </module>
886 <connection
887   kind="avalon"
888   version="17.0"
889   start="nios2_gen2_0.data_master"
890   end="jtag_uart_0.avalon_jtag_slave">
891  <parameter name="arbitrationPriority" value="1" />
892  <parameter name="baseAddress" value="0x00201000" />
893  <parameter name="defaultConnection" value="false" />
894 </connection>
895 <connection
896   kind="avalon"
897   version="17.0"
898   start="nios2_gen2_0.data_master"
899   end="a_16550_uart_0.avalon_slave">
900  <parameter name="arbitrationPriority" value="1" />
901  <parameter name="baseAddress" value="0x00100000" />
902  <parameter name="defaultConnection" value="false" />
903 </connection>
904 <connection
905   kind="avalon"
906   version="17.0"
907   start="nios2_gen2_0.data_master"
908   end="ext_flash.avl_csr">
909  <parameter name="arbitrationPriority" value="1" />
910  <parameter name="baseAddress" value="0x00100240" />
911  <parameter name="defaultConnection" value="false" />
912 </connection>
913 <connection
914   kind="avalon"
915   version="17.0"
916   start="nios2_gen2_0.data_master"
917   end="ext_flash.avl_mem">
918  <parameter name="arbitrationPriority" value="1" />
919  <parameter name="baseAddress" value="0x08000000" />
920  <parameter name="defaultConnection" value="false" />
921 </connection>
922 <connection
923   kind="avalon"
924   version="17.0"
925   start="nios2_gen2_0.data_master"
926   end="sysid.control_slave">
927  <parameter name="arbitrationPriority" value="1" />
928  <parameter name="baseAddress" value="0x00100300" />
929  <parameter name="defaultConnection" value="false" />
930 </connection>
931 <connection
932   kind="avalon"
933   version="17.0"
934   start="nios2_gen2_0.data_master"
935   end="msgdma_0.csr">
936  <parameter name="arbitrationPriority" value="1" />
937  <parameter name="baseAddress" value="0x001002c0" />
938  <parameter name="defaultConnection" value="false" />
939 </connection>
940 <connection
941   kind="avalon"
942   version="17.0"
943   start="nios2_gen2_0.data_master"
944   end="i2c_0.csr">
945  <parameter name="arbitrationPriority" value="1" />
946  <parameter name="baseAddress" value="0x00100200" />
947  <parameter name="defaultConnection" value="false" />
948 </connection>
949 <connection
950   kind="avalon"
951   version="17.0"
952   start="nios2_gen2_0.data_master"
953   end="onchip_flash_0.csr">
954  <parameter name="arbitrationPriority" value="1" />
955  <parameter name="baseAddress" value="0x00200000" />
956  <parameter name="defaultConnection" value="false" />
957 </connection>
958 <connection
959   kind="avalon"
960   version="17.0"
961   start="nios2_gen2_0.data_master"
962   end="onchip_flash_0.data">
963  <parameter name="arbitrationPriority" value="1" />
964  <parameter name="baseAddress" value="0x0000" />
965  <parameter name="defaultConnection" value="false" />
966 </connection>
967 <connection
968   kind="avalon"
969   version="17.0"
970   start="nios2_gen2_0.data_master"
971   end="nios2_gen2_0.debug_mem_slave">
972  <parameter name="arbitrationPriority" value="1" />
973  <parameter name="baseAddress" value="0x00200800" />
974  <parameter name="defaultConnection" value="false" />
975 </connection>
976 <connection
977   kind="avalon"
978   version="17.0"
979   start="nios2_gen2_0.data_master"
980   end="msgdma_0.descriptor_slave">
981  <parameter name="arbitrationPriority" value="1" />
982  <parameter name="baseAddress" value="0x001002f0" />
983  <parameter name="defaultConnection" value="false" />
984 </connection>
985 <connection
986   kind="avalon"
987   version="17.0"
988   start="nios2_gen2_0.data_master"
989   end="onchip_memory2_0.s1">
990  <parameter name="arbitrationPriority" value="1" />
991  <parameter name="baseAddress" value="0x00400000" />
992  <parameter name="defaultConnection" value="false" />
993 </connection>
994 <connection
995   kind="avalon"
996   version="17.0"
997   start="nios2_gen2_0.data_master"
998   end="timer_0.s1">
999  <parameter name="arbitrationPriority" value="1" />
1000  <parameter name="baseAddress" value="0x001002a0" />
1001  <parameter name="defaultConnection" value="false" />
1002 </connection>
1003 <connection
1004   kind="avalon"
1005   version="17.0"
1006   start="nios2_gen2_0.data_master"
1007   end="led.s1">
1008  <parameter name="arbitrationPriority" value="1" />
1009  <parameter name="baseAddress" value="0x001002e0" />
1010  <parameter name="defaultConnection" value="false" />
1011 </connection>
1012 <connection
1013   kind="avalon"
1014   version="17.0"
1015   start="nios2_gen2_0.data_master"
1016   end="spi_0.spi_control_port">
1017  <parameter name="arbitrationPriority" value="1" />
1018  <parameter name="baseAddress" value="0x00100280" />
1019  <parameter name="defaultConnection" value="false" />
1020 </connection>
1021 <connection
1022   kind="avalon"
1023   version="17.0"
1024   start="nios2_gen2_0.instruction_master"
1025   end="ext_flash.avl_mem">
1026  <parameter name="arbitrationPriority" value="1" />
1027  <parameter name="baseAddress" value="0x08000000" />
1028  <parameter name="defaultConnection" value="false" />
1029 </connection>
1030 <connection
1031   kind="avalon"
1032   version="17.0"
1033   start="nios2_gen2_0.instruction_master"
1034   end="onchip_flash_0.data">
1035  <parameter name="arbitrationPriority" value="1" />
1036  <parameter name="baseAddress" value="0x0000" />
1037  <parameter name="defaultConnection" value="false" />
1038 </connection>
1039 <connection
1040   kind="avalon"
1041   version="17.0"
1042   start="nios2_gen2_0.instruction_master"
1043   end="nios2_gen2_0.debug_mem_slave">
1044  <parameter name="arbitrationPriority" value="1" />
1045  <parameter name="baseAddress" value="0x00200800" />
1046  <parameter name="defaultConnection" value="false" />
1047 </connection>
1048 <connection
1049   kind="avalon"
1050   version="17.0"
1051   start="nios2_gen2_0.instruction_master"
1052   end="onchip_memory2_0.s1">
1053  <parameter name="arbitrationPriority" value="1" />
1054  <parameter name="baseAddress" value="0x00400000" />
1055  <parameter name="defaultConnection" value="false" />
1056 </connection>
1057 <connection
1058   kind="avalon"
1059   version="17.0"
1060   start="msgdma_0.mm_read"
1061   end="onchip_memory2_0.s1">
1062  <parameter name="arbitrationPriority" value="1" />
1063  <parameter name="baseAddress" value="0x00400000" />
1064  <parameter name="defaultConnection" value="false" />
1065 </connection>
1066 <connection
1067   kind="avalon"
1068   version="17.0"
1069   start="msgdma_0.mm_write"
1070   end="onchip_memory2_0.s1">
1071  <parameter name="arbitrationPriority" value="1" />
1072  <parameter name="baseAddress" value="0x00400000" />
1073  <parameter name="defaultConnection" value="false" />
1074 </connection>
1075 <connection
1076   kind="clock"
1077   version="17.0"
1078   start="altpll_0.c0"
1079   end="ext_flash.clock_sink" />
1080 <connection kind="clock" version="17.0" start="clk_0.clk" end="nios2_gen2_0.clk" />
1081 <connection kind="clock" version="17.0" start="clk_0.clk" end="jtag_uart_0.clk" />
1082 <connection kind="clock" version="17.0" start="clk_0.clk" end="timer_0.clk" />
1083 <connection kind="clock" version="17.0" start="clk_0.clk" end="spi_0.clk" />
1084 <connection kind="clock" version="17.0" start="clk_0.clk" end="led.clk" />
1085 <connection kind="clock" version="17.0" start="clk_0.clk" end="sysid.clk" />
1086 <connection
1087   kind="clock"
1088   version="17.0"
1089   start="clk_0.clk"
1090   end="onchip_flash_0.clk" />
1091 <connection
1092   kind="clock"
1093   version="17.0"
1094   start="clk_0.clk"
1095   end="onchip_memory2_0.clk1" />
1096 <connection
1097   kind="clock"
1098   version="17.0"
1099   start="clk_0.clk"
1100   end="a_16550_uart_0.clock" />
1101 <connection kind="clock" version="17.0" start="clk_0.clk" end="msgdma_0.clock" />
1102 <connection kind="clock" version="17.0" start="clk_0.clk" end="i2c_0.clock" />
1103 <connection
1104   kind="clock"
1105   version="17.0"
1106   start="clk_0.clk"
1107   end="altpll_0.inclk_interface" />
1108 <connection
1109   kind="interrupt"
1110   version="17.0"
1111   start="nios2_gen2_0.irq"
1112   end="msgdma_0.csr_irq">
1113  <parameter name="irqNumber" value="3" />
1114 </connection>
1115 <connection
1116   kind="interrupt"
1117   version="17.0"
1118   start="nios2_gen2_0.irq"
1119   end="i2c_0.interrupt_sender">
1120  <parameter name="irqNumber" value="4" />
1121 </connection>
1122 <connection
1123   kind="interrupt"
1124   version="17.0"
1125   start="nios2_gen2_0.irq"
1126   end="ext_flash.interrupt_sender">
1127  <parameter name="irqNumber" value="6" />
1128 </connection>
1129 <connection
1130   kind="interrupt"
1131   version="17.0"
1132   start="nios2_gen2_0.irq"
1133   end="jtag_uart_0.irq">
1134  <parameter name="irqNumber" value="0" />
1135 </connection>
1136 <connection
1137   kind="interrupt"
1138   version="17.0"
1139   start="nios2_gen2_0.irq"
1140   end="timer_0.irq">
1141  <parameter name="irqNumber" value="2" />
1142 </connection>
1143 <connection
1144   kind="interrupt"
1145   version="17.0"
1146   start="nios2_gen2_0.irq"
1147   end="spi_0.irq">
1148  <parameter name="irqNumber" value="5" />
1149 </connection>
1150 <connection
1151   kind="interrupt"
1152   version="17.0"
1153   start="nios2_gen2_0.irq"
1154   end="a_16550_uart_0.irq_sender">
1155  <parameter name="irqNumber" value="1" />
1156 </connection>
1157 <connection
1158   kind="reset"
1159   version="17.0"
1160   start="clk_0.clk_reset"
1161   end="altpll_0.inclk_interface_reset" />
1162 <connection
1163   kind="reset"
1164   version="17.0"
1165   start="clk_0.clk_reset"
1166   end="onchip_flash_0.nreset" />
1167 <connection
1168   kind="reset"
1169   version="17.0"
1170   start="clk_0.clk_reset"
1171   end="nios2_gen2_0.reset" />
1172 <connection
1173   kind="reset"
1174   version="17.0"
1175   start="clk_0.clk_reset"
1176   end="jtag_uart_0.reset" />
1177 <connection
1178   kind="reset"
1179   version="17.0"
1180   start="clk_0.clk_reset"
1181   end="timer_0.reset" />
1182 <connection kind="reset" version="17.0" start="clk_0.clk_reset" end="spi_0.reset" />
1183 <connection
1184   kind="reset"
1185   version="17.0"
1186   start="clk_0.clk_reset"
1187   end="ext_flash.reset" />
1188 <connection kind="reset" version="17.0" start="clk_0.clk_reset" end="led.reset" />
1189 <connection kind="reset" version="17.0" start="clk_0.clk_reset" end="sysid.reset" />
1190 <connection
1191   kind="reset"
1192   version="17.0"
1193   start="clk_0.clk_reset"
1194   end="onchip_memory2_0.reset1" />
1195 <connection
1196   kind="reset"
1197   version="17.0"
1198   start="clk_0.clk_reset"
1199   end="msgdma_0.reset_n" />
1200 <connection
1201   kind="reset"
1202   version="17.0"
1203   start="clk_0.clk_reset"
1204   end="a_16550_uart_0.reset_sink" />
1205 <connection
1206   kind="reset"
1207   version="17.0"
1208   start="clk_0.clk_reset"
1209   end="i2c_0.reset_sink" />
1210 <connection
1211   kind="reset"
1212   version="17.0"
1213   start="nios2_gen2_0.debug_reset_request"
1214   end="nios2_gen2_0.reset" />
1215 <connection
1216   kind="reset"
1217   version="17.0"
1218   start="nios2_gen2_0.debug_reset_request"
1219   end="jtag_uart_0.reset" />
1220 <connection
1221   kind="reset"
1222   version="17.0"
1223   start="nios2_gen2_0.debug_reset_request"
1224   end="spi_0.reset" />
1225 <connection
1226   kind="reset"
1227   version="17.0"
1228   start="nios2_gen2_0.debug_reset_request"
1229   end="ext_flash.reset" />
1230 <connection
1231   kind="reset"
1232   version="17.0"
1233   start="nios2_gen2_0.debug_reset_request"
1234   end="led.reset" />
1235 <connection
1236   kind="reset"
1237   version="17.0"
1238   start="nios2_gen2_0.debug_reset_request"
1239   end="onchip_memory2_0.reset1" />
1240 <connection
1241   kind="reset"
1242   version="17.0"
1243   start="nios2_gen2_0.debug_reset_request"
1244   end="msgdma_0.reset_n" />
1245 <interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" />
1246 <interconnectRequirement for="$system" name="qsys_mm.enableEccProtection" value="FALSE" />
1247 <interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="FALSE" />
1248 <interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="1" />
1249</system>
1250