1# TI SimpleLink CC3235SF SoC
2
3# Copyright (c) 2019, Texas Instruments Incorporated
4# SPDX-License-Identifier: Apache-2.0
5
6if SOC_CC3235SF
7
8config SOC
9	default "cc3235sf"
10
11config NUM_IRQS
12	# must be >= the highest interrupt number used
13	# This includes the NWP interrupt
14	default 179
15
16config SYS_CLOCK_HW_CYCLES_PER_SEC
17	default 80000000
18
19config ROM_START_OFFSET
20	default 0x800 if XIP
21	default 0x0   if !XIP
22
23# Override the setting in misc/Kconfig to allow full use of SRAM:
24config BOOTLOADER_SRAM_SIZE
25	default 0 if !XIP
26
27if GPIO
28
29config GPIO_CC32XX
30	default y
31
32endif # GPIO
33
34if !XIP
35config FLASH_SIZE
36	default 0
37config FLASH_BASE_ADDRESS
38	default 0
39endif
40
41endif # SOC_CC3235SF
42