1 /* 2 * Copyright (c) 2021 Andrés Manelli <am@toroid.io> 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 /** @file 8 * @brief System module to support early STM32 MCU configuration 9 */ 10 11 #include <device.h> 12 #include <init.h> 13 #include <soc.h> 14 #include <arch/cpu.h> 15 #include <stm32_ll_system.h> 16 #include <stm32_ll_bus.h> 17 18 /** 19 * @brief Perform SoC configuration at boot. 20 * 21 * This should be run early during the boot process but after basic hardware 22 * initialization is done. 23 * 24 * @return 0 25 */ st_stm32_common_config(const struct device * dev)26static int st_stm32_common_config(const struct device *dev) 27 { 28 #ifdef CONFIG_LOG_BACKEND_SWO 29 /* TRACE pin assignment for asynchronous mode */ 30 DBGMCU->CR &= ~DBGMCU_CR_TRACE_MODE_Msk; 31 /* Enable the SWO pin */ 32 DBGMCU->CR |= DBGMCU_CR_TRACE_IOEN; 33 #endif 34 35 #if defined(CONFIG_USE_SEGGER_RTT) 36 /* On some STM32 boards, for unclear reason, 37 * RTT feature is working with realtime update only when 38 * - one of the DMA is clocked. 39 * See https://github.com/zephyrproject-rtos/zephyr/issues/34324 40 */ 41 #if defined(__HAL_RCC_DMA1_CLK_ENABLE) 42 __HAL_RCC_DMA1_CLK_ENABLE(); 43 #endif /* __HAL_RCC_DMA1_CLK_ENABLE */ 44 45 /* On some STM32 boards, for unclear reason, 46 * RTT feature is working with realtime update only when 47 * - one of the DBGMCU bit STOP/STANDBY/SLEEP is set 48 * See https://github.com/zephyrproject-rtos/zephyr/issues/34324 49 */ 50 #if defined(LL_APB1_GRP1_PERIPH_DBGMCU) 51 LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_DBGMCU); 52 #elif defined(LL_APB1_GRP2_PERIPH_DBGMCU) 53 LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_DBGMCU); 54 #elif defined(LL_APB2_GRP1_PERIPH_DBGMCU) 55 LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_DBGMCU); 56 #endif /* LL_APB1_GRP1_PERIPH_DBGMCU */ 57 58 #if defined(CONFIG_SOC_SERIES_STM32H7X) || defined(CONFIG_SOC_SERIES_STM32MP1X) 59 HAL_EnableDBGSleepMode(); 60 #else 61 LL_DBGMCU_EnableDBGStopMode(); 62 #endif /* CONFIG_SOC_SERIES_STM32H7X || CONFIG_SOC_SERIES_STM32MP1X */ 63 64 #endif /* CONFIG_USE_SEGGER_RTT */ 65 66 return 0; 67 } 68 69 SYS_INIT(st_stm32_common_config, PRE_KERNEL_1, 1); 70
