1 /* 2 * Copyright (c) 2016 Piotr Mienkowski 3 * SPDX-License-Identifier: Apache-2.0 4 */ 5 6 /** @file 7 * @brief System module to support early Atmel SAM E70 MCU configuration 8 */ 9 10 #include <device.h> 11 #include <init.h> 12 #include <soc.h> 13 #include <arch/cpu.h> 14 15 /** 16 * @brief Perform SoC configuration at boot. 17 * 18 * This should be run early during the boot process but after basic hardware 19 * initialization is done. 20 * 21 * @return 0 22 */ atmel_same70_config(const struct device * dev)23static int atmel_same70_config(const struct device *dev) 24 { 25 #ifdef CONFIG_SOC_ATMEL_SAME70_DISABLE_ERASE_PIN 26 /* Disable ERASE function on PB12 pin, this is controlled by Bus Matrix */ 27 MATRIX->CCFG_SYSIO |= CCFG_SYSIO_SYSIO12; 28 #endif 29 30 /* In Cortex-M based SoCs JTAG interface can be used to perform 31 * IEEE1149.1 JTAG Boundary scan only. It can not be used as a debug 32 * interface therefore there is no harm done by disabling the JTAG TDI 33 * pin by default. 34 */ 35 /* Disable TDI function on PB4 pin, this is controlled by Bus Matrix */ 36 MATRIX->CCFG_SYSIO |= CCFG_SYSIO_SYSIO4; 37 38 #ifdef CONFIG_LOG_BACKEND_SWO 39 /* Disable PCK3 clock used by ETM module */ 40 PMC->PMC_SCDR = PMC_SCDR_PCK3; 41 while ((PMC->PMC_SCSR) & PMC_SCSR_PCK3) { 42 ; 43 } 44 /* Select PLLA clock as PCK3 clock */ 45 PMC->PMC_PCK[3] = PMC_MCKR_CSS_PLLA_CLK; 46 /* Enable PCK3 clock */ 47 PMC->PMC_SCER = PMC_SCER_PCK3; 48 /* Wait for PCK3 setup to complete */ 49 while (!((PMC->PMC_SR) & PMC_SR_PCKRDY3)) { 50 ; 51 } 52 /* Enable TDO/TRACESWO function on PB5 pin */ 53 MATRIX->CCFG_SYSIO &= ~CCFG_SYSIO_SYSIO5; 54 #else 55 /* Disable TDO/TRACESWO function on PB5 pin */ 56 MATRIX->CCFG_SYSIO |= CCFG_SYSIO_SYSIO5; 57 #endif 58 59 return 0; 60 } 61 62 SYS_INIT(atmel_same70_config, PRE_KERNEL_1, 1); 63
