1 /* 2 * Copyright (c) 2021 Microchip Technology Inc. 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 /** 8 * @brief Driver for External interrupt controller in Microchip XEC devices 9 * 10 * Based on reference manuals: 11 * Reference Manuals for MEC152x and MEC172x ARM(r) 32-bit MCUs 12 * 13 * Chapter: EC Interrupt Aggregator (ECIA) 14 * 15 */ 16 17 #ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_MCHP_XEC_ECIA_H_ 18 #define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_MCHP_XEC_ECIA_H_ 19 20 #include <device.h> 21 #include <irq.h> 22 23 /** 24 * @brief enable GIRQn interrupt for specific source 25 * 26 * @param girq_id is the GIRQ number (8 - 26) 27 * @param src is the interrupt source in the GIRQ (0 - 31) 28 */ 29 int mchp_xec_ecia_enable(int girq_id, int src); 30 31 /** 32 * @brief disable EXTI interrupt for specific line 33 * 34 * @param girq_id is the GIRQ number (8 - 26) 35 * @param src is the interrupt source in the GIRQ (0 - 31) 36 */ 37 int mchp_xec_ecia_disable(int girq_id, int src); 38 39 40 /* callback for ECIA GIRQ interrupt source */ 41 typedef void (*mchp_xec_ecia_callback_t) (int girq_id, int src, void *user); 42 43 /** 44 * @brief set GIRQn interrupt source callback 45 * 46 * @param girq_id is the GIRQ number (8 - 26) 47 * @param src is the interrupt source in the GIRQ (0 - 31) 48 * @param cb user callback 49 * @param data user data 50 */ 51 int mchp_xec_ecia_set_callback(int girq_id, int src, 52 mchp_xec_ecia_callback_t cb, void *data); 53 54 /** 55 * @brief set GIRQn interrupt source callback 56 * 57 * @param dev_girq is a handle to the GIRQn device 58 * @param src is the interrupt source in the GIRQ (0 - 31) 59 * @param cb user callback 60 * @param data user data 61 */ 62 int mchp_xec_ecia_set_callback_by_dev(const struct device *dev_girq, int src, 63 mchp_xec_ecia_callback_t cb, void *data); 64 65 /** 66 * @brief unset GIRQn interrupt source callback 67 * 68 * @param girq_id is the GIRQ number (8 - 26) 69 * @param src is the interrupt source in the GIRQ (0 - 31) 70 */ 71 int mchp_ecia_unset_callback(int girq_id, int src); 72 73 /** 74 * @brief unset GIRQn interrupt source callback 75 * 76 * @param dev_girq is a handle to the GIRQn device 77 * @param src is the interrupt source in the GIRQ (0 - 31) 78 */ 79 int mchp_ecia_unset_callback_by_dev(const struct device *dev_girq, int src); 80 81 /* platform specific */ 82 /** @brief enable or disable aggregated GIRQ output 83 * 84 * @param girq_id is the GIRQ number (8 - 26) 85 * @param enable non-zero enables aggregated output else disables 86 */ 87 void mchp_xec_ecia_girq_aggr_en(uint8_t girq_id, uint8_t enable); 88 89 /** @brief clear GIRQ latched source status bit 90 * 91 * @param girq_id is the GIRQ number (8 - 26) 92 * @param src_bit is the source bit position in the GIRQ registers (0 - 31) 93 */ 94 void mchp_xec_ecia_girq_src_clr(uint8_t girq_id, uint8_t src_bit); 95 96 /** @brief enable a source in a GIRQ 97 * 98 * @param girq_id is the GIRQ number (8 - 26) 99 * @param src_bit is the source bit position in the GIRQ registers (0 - 31) 100 */ 101 void mchp_xec_ecia_girq_src_en(uint8_t girq_id, uint8_t src_bit); 102 103 /** @brief disable a source in a GIRQ 104 * 105 * @param girq_id is the GIRQ number (8 - 26) 106 * @param src_bit is the source bit position in the GIRQ registers (0 - 31) 107 */ 108 void mchp_xec_ecia_girq_src_dis(uint8_t girq_id, uint8_t src_bit); 109 110 /** @brief clear GIRQ latches sources specified in bitmap 111 * 112 * @param girq_id is the GIRQ number (8 - 26) 113 * @param bitmap contains the source bits to clear 114 */ 115 void mchp_xec_ecia_girq_src_clr_bitmap(uint8_t girq_id, uint32_t bitmap); 116 117 /** @brief enable sources in a GIRQ 118 * 119 * @param girq_id is the GIRQ number (8 - 26) 120 * @param bitmap contains the source bits to enable 121 */ 122 void mchp_xec_ecia_girq_src_en_bitmap(uint8_t girq_id, uint32_t bitmap); 123 124 /** @brief disable sources in a GIRQ 125 * 126 * @param girq_id is the GIRQ number (8 - 26) 127 * @param bitmap contains the source bits to disable 128 */ 129 void mchp_xec_ecia_girq_src_dis_bitmap(uint8_t girq_id, uint32_t bitmap); 130 131 /** @brief Read GIRQ result register (bit-wise OR of enable and source) 132 * 133 * @param girq_id is the GIRQ number (8 - 26) 134 * @return 32-bit unsigned result register value 135 */ 136 uint32_t mchp_xec_ecia_girq_result(uint8_t girq_id); 137 138 /** @brief Clear external NVIC input pending status 139 * 140 * @param nvic_num is 0 to maximum NVIC inputs for the chip. 141 */ 142 void mchp_xec_ecia_nvic_clr_pend(uint32_t nvic_num); 143 144 #endif /* ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_MCHP_XEC_ECIA_H_ */ 145
