1 /*
2 * Copyright (c) 2016 Cadence Design Systems, Inc.
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6 /**
7 * @file
8 * @brief Xtensa specific kernel interface header
9 * This header contains the Xtensa specific kernel interface. It is included
10 * by the generic kernel interface header (include/arch/cpu.h)
11 */
12
13 #ifndef ZEPHYR_INCLUDE_ARCH_XTENSA_ARCH_H_
14 #define ZEPHYR_INCLUDE_ARCH_XTENSA_ARCH_H_
15
16 #include <irq.h>
17
18 #include <devicetree.h>
19 #if !defined(_ASMLANGUAGE) && !defined(__ASSEMBLER__)
20 #include <zephyr/types.h>
21 #include <toolchain.h>
22 #include <arch/common/sys_bitops.h>
23 #include <arch/common/sys_io.h>
24 #include <arch/common/ffs.h>
25 #include <sw_isr_table.h>
26 #include <arch/xtensa/thread.h>
27 #include <arch/xtensa/irq.h>
28 #include <xtensa/config/core.h>
29 #include <arch/common/addr_types.h>
30
31 #ifdef CONFIG_KERNEL_COHERENCE
32 #define ARCH_STACK_PTR_ALIGN XCHAL_DCACHE_LINESIZE
33 #else
34 #define ARCH_STACK_PTR_ALIGN 16
35 #endif
36
37 /* Xtensa GPRs are often designated by two different names */
38 #define sys_define_gpr_with_alias(name1, name2) union { uint32_t name1, name2; }
39
40 #include <arch/xtensa/exc.h>
41
42 #ifdef __cplusplus
43 extern "C" {
44 #endif
45
46 /* internal routine documented in C file, needed by IRQ_CONNECT() macro */
47 extern void z_irq_priority_set(uint32_t irq, uint32_t prio, uint32_t flags);
48
49 #define ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p) \
50 { \
51 Z_ISR_DECLARE(irq_p, flags_p, isr_p, isr_param_p); \
52 }
53
54 /* Spurious interrupt handler. Throws an error if called */
55 extern void z_irq_spurious(const void *unused);
56
57 #define XTENSA_ERR_NORET
58
59 extern uint32_t sys_clock_cycle_get_32(void);
60
arch_k_cycle_get_32(void)61 static inline uint32_t arch_k_cycle_get_32(void)
62 {
63 return sys_clock_cycle_get_32();
64 }
65
arch_nop(void)66 static ALWAYS_INLINE void arch_nop(void)
67 {
68 __asm__ volatile("nop");
69 }
70
71 #ifdef __cplusplus
72 }
73 #endif
74
75 #endif /* !defined(_ASMLANGUAGE) && !defined(__ASSEMBLER__) */
76
77 #endif /* ZEPHYR_INCLUDE_ARCH_XTENSA_ARCH_H_ */
78
