1/* 2 * Copyright (c) 2018 Georgij Cernysiov 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7#include <st/l4/stm32l4.dtsi> 8 9/ { 10 soc { 11 pinctrl: pin-controller@48000000 { 12 gpiod: gpio@48000c00 { 13 compatible = "st,stm32-gpio"; 14 gpio-controller; 15 #gpio-cells = <2>; 16 reg = <0x48000c00 0x400>; 17 clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000008>; 18 label = "GPIOD"; 19 }; 20 21 gpioe: gpio@48001000 { 22 compatible = "st,stm32-gpio"; 23 gpio-controller; 24 #gpio-cells = <2>; 25 reg = <0x48001000 0x400>; 26 clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000010>; 27 label = "GPIOE"; 28 }; 29 }; 30 31 usb: usb@40006800 { 32 compatible = "st,stm32-usb"; 33 reg = <0x40006800 0x40000>; 34 interrupts = <67 0>; 35 interrupt-names = "usb"; 36 num-bidir-endpoints = <8>; 37 ram-size = <1024>; 38 maximum-speed = "full-speed"; 39 phys = <&usb_fs_phy>; 40 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x04000000>; 41 status = "disabled"; 42 label = "USB"; 43 }; 44 45 i2c2: i2c@40005800 { 46 compatible = "st,stm32-i2c-v2"; 47 clock-frequency = <I2C_BITRATE_STANDARD>; 48 #address-cells = <1>; 49 #size-cells = <0>; 50 reg = <0x40005800 0x400>; 51 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00400000>; 52 interrupts = <33 0>, <34 0>; 53 interrupt-names = "event", "error"; 54 status = "disabled"; 55 label= "I2C_2"; 56 }; 57 58 i2c4: i2c@40008400 { 59 compatible = "st,stm32-i2c-v2"; 60 clock-frequency = <I2C_BITRATE_STANDARD>; 61 #address-cells = <1>; 62 #size-cells = <0>; 63 reg = <0x40008400 0x400>; 64 clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000002>; 65 interrupts = <83 0>, <84 0>; 66 interrupt-names = "event", "error"; 67 status = "disabled"; 68 label= "I2C_4"; 69 }; 70 71 spi2: spi@40003800 { 72 compatible = "st,stm32-spi-fifo", "st,stm32-spi"; 73 #address-cells = <1>; 74 #size-cells = <0>; 75 reg = <0x40003800 0x400>; 76 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>; 77 interrupts = <36 5>; 78 status = "disabled"; 79 label = "SPI_2"; 80 }; 81 82 spi3: spi@40003c00 { 83 compatible = "st,stm32-spi-fifo", "st,stm32-spi"; 84 #address-cells = <1>; 85 #size-cells = <0>; 86 reg = <0x40003c00 0x400>; 87 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00008000>; 88 interrupts = <51 5>; 89 status = "disabled"; 90 label = "SPI_3"; 91 }; 92 93 usart3: serial@40004800 { 94 compatible = "st,stm32-usart", "st,stm32-uart"; 95 reg = <0x40004800 0x400>; 96 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>; 97 interrupts = <39 0>; 98 status = "disabled"; 99 label = "UART_3"; 100 }; 101 102 uart4: serial@40004c00 { 103 compatible = "st,stm32-uart"; 104 reg = <0x40004c00 0x400>; 105 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00080000>; 106 interrupts = <52 0>; 107 status = "disabled"; 108 label = "UART_4"; 109 }; 110 111 timers3: timers@40000400 { 112 compatible = "st,stm32-timers"; 113 reg = <0x40000400 0x400>; 114 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000002>; 115 interrupts = <29 0>; 116 interrupt-names = "global"; 117 status = "disabled"; 118 label = "TIMERS_3"; 119 120 pwm { 121 compatible = "st,stm32-pwm"; 122 status = "disabled"; 123 st,prescaler = <0>; 124 label = "PWM_3"; 125 #pwm-cells = <3>; 126 }; 127 }; 128 129 dac1: dac@40007400 { 130 compatible = "st,stm32-dac"; 131 reg = <0x40007400 0x400>; 132 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x20000000>; 133 status = "disabled"; 134 label = "DAC_1"; 135 #io-channel-cells = <1>; 136 }; 137 138 can1: can@40006400 { 139 compatible = "st,stm32-can"; 140 #address-cells = <1>; 141 #size-cells = <0>; 142 reg = <0x40006400 0x400>; 143 interrupts = <19 0>, <20 0>, <21 0>, <22 0>; 144 interrupt-names = "TX", "RX0", "RX1", "SCE"; 145 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x02000000>; //RCC_APB1ENR1_CAN1EN 146 status = "disabled"; 147 label = "CAN_1"; 148 bus-speed = <125000>; 149 sjw = <1>; 150 prop-seg = <0>; 151 phase-seg1 = <4>; 152 phase-seg2 = <5>; 153 }; 154 }; 155 156 usb_fs_phy: usbphy { 157 compatible = "usb-nop-xceiv"; 158 #phy-cells = <0>; 159 label = "USB_FS_PHY"; 160 }; 161}; 162
