1/* 2 * Copyright (c) 2020 Alexander Mihajlovic <a@abxy.se> 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7#include <st/l0/stm32l0.dtsi> 8 9/ { 10 soc { 11 pinctrl: pin-controller@50000000 { 12 gpioe: gpio@50001000 { 13 compatible = "st,stm32-gpio"; 14 gpio-controller; 15 #gpio-cells = <2>; 16 reg = <0x50001000 0x400>; 17 clocks = <&rcc STM32_CLOCK_BUS_IOP 0x00000010>; 18 label = "GPIOE"; 19 }; 20 }; 21 22 i2c2: i2c@40005800 { 23 compatible = "st,stm32-i2c-v2"; 24 clock-frequency = <I2C_BITRATE_STANDARD>; 25 #address-cells = <1>; 26 #size-cells = <0>; 27 reg = <0x40005800 0x400>; 28 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00400000>; 29 interrupts = <24 0>; 30 interrupt-names = "combined"; 31 status = "disabled"; 32 label= "I2C_2"; 33 }; 34 35 i2c3: i2c@40007800 { 36 compatible = "st,stm32-i2c-v2"; 37 clock-frequency = <I2C_BITRATE_STANDARD>; 38 #address-cells = <1>; 39 #size-cells = <0>; 40 reg = <0x40007800 0x400>; 41 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x40000000>; 42 interrupts = <21 0>; 43 interrupt-names = "combined"; 44 status = "disabled"; 45 label= "I2C_3"; 46 }; 47 48 spi2: spi@40003800 { 49 compatible = "st,stm32-spi"; 50 #address-cells = <1>; 51 #size-cells = <0>; 52 reg = <0x40003800 0x400>; 53 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>; 54 interrupts = <26 3>; 55 status = "disabled"; 56 label = "SPI_2"; 57 }; 58 59 timers3: timers@40000400 { 60 compatible = "st,stm32-timers"; 61 reg = <0x40000400 0x400>; 62 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000002>; 63 interrupts = <16 0>; 64 interrupt-names = "global"; 65 status = "disabled"; 66 label = "TIMERS_3"; 67 68 pwm { 69 compatible = "st,stm32-pwm"; 70 status = "disabled"; 71 st,prescaler = <0>; 72 label = "PWM_3"; 73 #pwm-cells = <3>; 74 }; 75 }; 76 77 timers6: timers@40001000 { 78 compatible = "st,stm32-timers"; 79 reg = <0x40001000 0x400>; 80 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000010>; 81 interrupts = <17 0>; 82 interrupt-names = "global"; 83 status = "disabled"; 84 label = "TIMERS_6"; 85 86 pwm { 87 compatible = "st,stm32-pwm"; 88 status = "disabled"; 89 st,prescaler = <0>; 90 label = "PWM_6"; 91 #pwm-cells = <3>; 92 }; 93 }; 94 95 timers7: timers@40001400 { 96 compatible = "st,stm32-timers"; 97 reg = <0x40001400 0x400>; 98 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000020>; 99 interrupts = <18 0>; 100 interrupt-names = "global"; 101 status = "disabled"; 102 label = "TIMERS_7"; 103 104 pwm { 105 compatible = "st,stm32-pwm"; 106 status = "disabled"; 107 st,prescaler = <0>; 108 label = "PWM_7"; 109 #pwm-cells = <3>; 110 }; 111 }; 112 113 timers22: timers@40011400 { 114 compatible = "st,stm32-timers"; 115 reg = <0x40011400 0x400>; 116 clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000020>; 117 interrupts = <22 0>; 118 interrupt-names = "global"; 119 status = "disabled"; 120 label = "TIMERS_22"; 121 122 pwm { 123 compatible = "st,stm32-pwm"; 124 status = "disabled"; 125 st,prescaler = <0>; 126 label = "PWM_22"; 127 #pwm-cells = <3>; 128 }; 129 }; 130 131 usart1: serial@40013800 { 132 compatible = "st,stm32-usart", "st,stm32-uart"; 133 reg = <0x40013800 0x400>; 134 clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00004000>; 135 interrupts = <27 0>; 136 status = "disabled"; 137 label = "UART_1"; 138 }; 139 140 usart4: serial@40004c00 { 141 compatible = "st,stm32-usart", "st,stm32-uart"; 142 reg = <0x40004c00 0x400>; 143 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00080000>; 144 interrupts = <14 0>; 145 status = "disabled"; 146 label = "UART_4"; 147 }; 148 149 usart5: serial@40005000 { 150 compatible = "st,stm32-usart", "st,stm32-uart"; 151 reg = <0x40005000 0x400>; 152 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00100000>; 153 interrupts = <14 0>; 154 status = "disabled"; 155 label = "UART_5"; 156 }; 157 158 eeprom: eeprom@8080000{ 159 reg = <0x08080000 DT_SIZE_K(6)>; 160 }; 161 }; 162}; 163