1/*
2 * Copyright (c) 2020 Sebastian Schwabe <sebastian.schwabe@mailbox.tu-dresden.de>
3 *                    Fabian Paschke <fabian.paschke@eas.iis.fraunhofer.de>
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <mem.h>
8#include <st/f3/stm32f303.dtsi>
9
10/ {
11	ccm0: memory@10000000 {
12		compatible = "st,stm32-ccm";
13		reg = <0x10000000 DT_SIZE_K(8)>;
14	};
15
16	sram0: memory@20000000 {
17		reg = <0x20000000 DT_SIZE_K(12)>;
18	};
19
20	soc {
21		flash-controller@40022000 {
22			flash0: flash@8000000 {
23				reg = <0x08000000 DT_SIZE_K(64)>;
24			};
25		};
26
27		dac2: dac@40009800 {
28			compatible = "st,stm32-dac";
29			reg = <0x40009800 0x400>;
30			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x04000000>;
31			status = "disabled";
32			label = "DAC_2";
33			#io-channel-cells = <1>;
34		};
35	};
36};
37