1/* SPDX-License-Identifier: Apache-2.0 */ 2 3#include <arm/armv7-m.dtsi> 4#include <dt-bindings/gpio/gpio.h> 5#include <dt-bindings/i2c/i2c.h> 6#include "gpio_gecko.h" 7#include <dt-bindings/pwm/pwm.h> 8 9/ { 10 chosen { 11 zephyr,flash-controller = &msc; 12 }; 13 14 cpus { 15 #address-cells = <1>; 16 #size-cells = <0>; 17 18 cpu0: cpu@0 { 19 compatible = "arm,cortex-m4f"; 20 reg = <0>; 21 }; 22 }; 23 24 sram0: memory@20000000 { 25 compatible = "mmio-sram"; 26 }; 27 28 soc { 29 msc: flash-controller@400e0000 { 30 compatible = "silabs,gecko-flash-controller"; 31 label = "FLASH_CTRL"; 32 reg = <0x400e0000 0x78>; 33 interrupts = <24 0>; 34 35 #address-cells = <1>; 36 #size-cells = <1>; 37 38 flash0: flash@0 { 39 compatible = "soc-nv-flash"; 40 label = "FLASH_0"; 41 write-block-size = <4>; 42 erase-block-size = <2048>; 43 }; 44 }; 45 46 usart0: usart@40010000 { /* USART0 */ 47 compatible = "silabs,gecko-usart"; 48 reg = <0x40010000 0x400>; 49 interrupts = <11 0>, <12 0>; 50 interrupt-names = "rx", "tx"; 51 peripheral-id = <0>; 52 status = "disabled"; 53 label = "USART_0"; 54 }; 55 56 usart1: usart@40010400 { /* USART1 */ 57 compatible = "silabs,gecko-usart"; 58 reg = <0x40010400 0x400>; 59 interrupts = <19 0>, <20 0>; 60 interrupt-names = "rx", "tx"; 61 peripheral-id = <1>; 62 status = "disabled"; 63 label = "USART_1"; 64 }; 65 66 leuart0: leuart@4004a000 { /* LEUART0 */ 67 compatible = "silabs,gecko-leuart"; 68 reg = <0x4004a000 0x400>; 69 interrupts = <21 0>; 70 peripheral-id = <0>; 71 status = "disabled"; 72 label = "LEUART_0"; 73 }; 74 75 i2c0: i2c@4000c000 { 76 compatible = "silabs,gecko-i2c"; 77 clock-frequency = <I2C_BITRATE_STANDARD>; 78 #address-cells = <1>; 79 #size-cells = <0>; 80 reg = <0x4000c000 0x400>; 81 interrupts = <16 0>; 82 label = "I2C_0"; 83 status = "disabled"; 84 }; 85 86 rtcc0: rtcc@40042000 { 87 compatible = "silabs,gecko-rtcc"; 88 reg = <0x40042000 0x184>; 89 interrupts = <29 0>; 90 clock-frequency = <32768>; 91 prescaler = <1>; 92 status = "disabled"; 93 label = "RTCC_0"; 94 }; 95 96 gpio: gpio@4000a400 { 97 compatible = "silabs,gecko-gpio"; 98 reg = <0x4000a400 0xc00>; 99 interrupts = <9 2 17 2>; 100 interrupt-names = "GPIO_EVEN", "GPIO_ODD"; 101 label = "GPIO"; 102 103 ranges; 104 #address-cells = <1>; 105 #size-cells = <1>; 106 107 gpioa: gpio@4000a000 { 108 compatible = "silabs,gecko-gpio-port"; 109 reg = <0x4000a000 0x30>; 110 peripheral-id = <0>; 111 label = "GPIO_A"; 112 gpio-controller; 113 #gpio-cells = <2>; 114 status = "disabled"; 115 }; 116 117 gpiob: gpio@4000a030 { 118 compatible = "silabs,gecko-gpio-port"; 119 reg = <0x4000a030 0x30>; 120 peripheral-id = <1>; 121 label = "GPIO_B"; 122 gpio-controller; 123 #gpio-cells = <2>; 124 status = "disabled"; 125 }; 126 127 gpioc: gpio@4000a060 { 128 compatible = "silabs,gecko-gpio-port"; 129 reg = <0x4000a060 0x30>; 130 peripheral-id = <2>; 131 label = "GPIO_C"; 132 gpio-controller; 133 #gpio-cells = <2>; 134 status = "disabled"; 135 }; 136 137 gpiod: gpio@4000a090 { 138 compatible = "silabs,gecko-gpio-port"; 139 reg = <0x4000a090 0x30>; 140 peripheral-id = <3>; 141 label = "GPIO_D"; 142 gpio-controller; 143 #gpio-cells = <2>; 144 status = "disabled"; 145 }; 146 147 gpioe: gpio@4000a0c0 { 148 compatible = "silabs,gecko-gpio-port"; 149 reg = <0x4000a0c0 0x30>; 150 peripheral-id = <4>; 151 label = "GPIO_E"; 152 gpio-controller; 153 #gpio-cells = <2>; 154 status = "disabled"; 155 }; 156 157 gpiof: gpio@4000a0f0 { 158 compatible = "silabs,gecko-gpio-port"; 159 reg = <0x4000a0f0 0x30>; 160 peripheral-id = <5>; 161 label = "GPIO_F"; 162 gpio-controller; 163 #gpio-cells = <2>; 164 status = "disabled"; 165 }; 166 }; 167 168 wdog0: wdog@40052000 { 169 compatible = "silabs,gecko-wdog"; 170 reg = <0x40052000 0x2C>; 171 peripheral-id = <0>; 172 label = "WDOG0"; 173 interrupts = <2 0>; 174 status = "disabled"; 175 }; 176 177 timer0: timer@40018000 { 178 compatible = "silabs,gecko-timers"; 179 reg = <0x40018000 0x400>; 180 status = "disabled"; 181 label = "TIMER_0"; 182 183 pwm { 184 compatible = "silabs,gecko-pwm"; 185 status = "disabled"; 186 label = "PWM_0"; 187 #pwm-cells = <2>; 188 }; 189 }; 190 191 }; 192}; 193 194&nvic { 195 arm,num-irq-priority-bits = <3>; 196}; 197