1/*
2 * Copyright (c) 2020, Seagate Technology LLC
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6#include <arm/armv6-m.dtsi>
7#include <dt-bindings/clock/lpc11u6x_clock.h>
8#include <dt-bindings/gpio/gpio.h>
9#include <mem.h>
10
11/ {
12	cpus {
13		#address-cells = <1>;
14		#size-cells = <0>;
15
16		cpu0: cpu@0 {
17			compatible = "arm,cortex-m0+";
18			reg = <0>;
19		};
20	};
21
22	sram0:memory@10000000 {
23		compatible = "mmio-sram";
24	};
25
26	sram1:memory@20000000 {
27		compatible = "mmio-sram";
28		reg = <0x20000000 0x800>;
29	};
30
31	sram2:memory@20004000 {
32		compatible = "mmio-sram";
33		reg = <0x20004000 0x800>;
34	};
35
36	soc {
37		flash0:flash@0 {
38			compatible = "soc-nv-flash";
39		};
40
41		/* On-chip EEPROM. */
42		eeprom0: eeprom_0 {
43			compatible = "nxp,lpc11u6x-eeprom";
44			label = "EEPROM_0";
45			/*
46			 * For some reasons, the IAP commands don't allow to
47			 * reach the last 64 bytes of the EEPROM.
48			 */
49			size = <(DT_SIZE_K(4) - 64)>;
50			status = "okay";
51		};
52
53		/* PIO0_0 to PIO0_23. */
54		pinmux0: pinmux@40044000 {
55			compatible = "nxp,lpc11u6x-pinmux";
56			#pinmux-cells = <2>;
57			reg = <0x40044000 0x60>;
58			label = "PINMUX_0";
59			status = "okay";
60		};
61
62		/* PIO1_0 to PIO1_31. */
63		pinmux1: pinmux@40044060 {
64			compatible = "nxp,lpc11u6x-pinmux";
65			#pinmux-cells = <2>;
66			reg = <0x40044060 0x80>;
67			label = "PINMUX_1";
68			status = "okay";
69		};
70
71		/* PIO2_0 to PIO2_23. */
72		pinmux2: pinmux@400440f0 {
73			compatible = "nxp,lpc11u6x-pinmux";
74			#pinmux-cells = <2>;
75			reg = <0x400440f0 0x64>;
76			label = "PINMUX_2";
77			status = "okay";
78		};
79
80		/* GPIO0_0 to GPIO0_23 */
81		gpio0: gpio@0 {
82			compatible = "nxp,lpc11u6x-gpio";
83			reg = <0xa0000000 0x8000>, <0x40048000 0x400>;
84			interrupts = <0 2>, <1 2>, <2 2>, <3 2>, \
85				     <4 2>, <5 2>, <6 2>, <7 2>;
86
87			label = "GPIO_0";
88			gpio-controller;
89			#gpio-cells = <2>;
90			ngpios = <24>;
91
92			clocks = <&syscon LPC11U6X_CLOCK_GPIO>;
93			pinmux-port = <&pinmux0>;
94
95			status = "disabled";
96		};
97
98		/* GPIO1_0 to GPIO1_31 */
99		gpio1: gpio@1 {
100			compatible = "nxp,lpc11u6x-gpio";
101			reg = <0xa0000000 0x8000>, <0x40048000 0x400>;
102			interrupts = <0 2>, <1 2>, <2 2>, <3 2>, \
103				     <4 2>, <5 2>, <6 2>, <7 2>;
104
105			label = "GPIO_1";
106			gpio-controller;
107			#gpio-cells = <2>;
108
109			clocks = <&syscon LPC11U6X_CLOCK_GPIO>;
110			pinmux-port = <&pinmux1>;
111
112			status = "disabled";
113		};
114
115		/* GPIO2_2 to GPIO2_23 */
116		gpio2: gpio@2 {
117			compatible = "nxp,lpc11u6x-gpio";
118			reg = <0xa0000000 0x8000>, <0x40048000 0x400>;
119			interrupts = <0 2>, <1 2>, <2 2>, <3 2>, \
120				     <4 2>, <5 2>, <6 2>, <7 2>;
121
122			label = "GPIO_2";
123			gpio-controller;
124			#gpio-cells = <2>;
125			base = <2>;
126			ngpios = <22>;
127
128			clocks = <&syscon LPC11U6X_CLOCK_GPIO>;
129			pinmux-port = <&pinmux2>;
130
131			status = "disabled";
132		};
133
134		syscon: clock-controller@40048000 {
135			compatible = "nxp,lpc11u6x-syscon";
136			#clock-cells = <1>;
137			reg = <0x40048000 0x400>;
138			label = "SYSCON";
139			pinmuxs = <&pinmux2 0 1>, <&pinmux2 1 1>;
140			pinmux-names = "XTALIN", "XTALOUT";
141		};
142
143		uart0: serial@40008000 {
144			compatible = "nxp,lpc11u6x-uart";
145			clocks = <&syscon LPC11U6X_CLOCK_USART0>;
146			interrupts = <21 0>;
147			reg = <0x40008000 0x60>;
148			label = "UART_0";
149			status = "disabled";
150		};
151
152		uart1: serial@4006c000 {
153			compatible = "nxp,lpc11u6x-uart";
154			clocks = <&syscon LPC11U6X_CLOCK_USART1>;
155			interrupts = <11 0>;
156			reg = <0x4006C000 0x30>;
157			label = "UART_1";
158			status = "disabled";
159		};
160
161		uart2: serial@40070000 {
162			compatible = "nxp,lpc11u6x-uart";
163			clocks = <&syscon LPC11U6X_CLOCK_USART2>;
164			interrupts = <12 0>;
165			reg = <0x40070000 0x30>;
166			label = "UART_2";
167			status = "disabled";
168		};
169
170		uart3: serial@40074000 {
171			compatible = "nxp,lpc11u6x-uart";
172			clocks = <&syscon LPC11U6X_CLOCK_USART3>;
173			interrupts = <12 0>;
174			reg = <0x40074000 0x30>;
175			label = "UART_3";
176			status = "disabled";
177		};
178
179		uart4: serial@4004c000 {
180			compatible = "nxp,lpc11u6x-uart";
181			clocks = <&syscon LPC11U6X_CLOCK_USART4>;
182			interrupts = <11 0>;
183			reg = <0x4004C000 0x30>;
184			label = "UART_4";
185			status = "disabled";
186		};
187
188		i2c0: i2c@40000000 {
189			compatible = "nxp,lpc11u6x-i2c";
190			#address-cells = <1>;
191			#size-cells = <0>;
192			reg = <0x40000000 0x40>;
193			clocks = <&syscon LPC11U6X_CLOCK_I2C0>;
194			interrupts = <15 0>;
195			status = "disabled";
196			label = "I2C_0";
197		};
198
199		i2c1: i2c@40020000 {
200			compatible = "nxp,lpc11u6x-i2c";
201			#address-cells = <1>;
202			#size-cells = <0>;
203			reg = <0x40020000 0x40>;
204			clocks = <&syscon LPC11U6X_CLOCK_I2C1>;
205			interrupts = <10 0>;
206			status = "disabled";
207			label = "I2C_1";
208		};
209	};
210};
211
212&nvic {
213	arm,num-irq-priority-bits = <2>;
214};
215