1 /* 2 * Copyright (c) 2016 Open-RnD Sp. z o.o. 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 /** 8 * @file header for STM32 pin multiplexing 9 */ 10 11 #ifndef ZEPHYR_DRIVERS_PINMUX_STM32_PINMUX_STM32_H_ 12 #define ZEPHYR_DRIVERS_PINMUX_STM32_PINMUX_STM32_H_ 13 14 #include <zephyr/types.h> 15 #include <drivers/clock_control.h> 16 #if DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) 17 #include <dt-bindings/pinctrl/stm32f1-pinctrl.h> 18 #else 19 #include <dt-bindings/pinctrl/stm32-pinctrl.h> 20 #endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) */ 21 22 #ifdef __cplusplus 23 extern "C" { 24 #endif 25 26 struct pin_config { 27 uint8_t pin_num; 28 uint32_t mode; 29 }; 30 31 /** 32 * @brief structure to convey pinctrl information for stm32 soc 33 * value 34 */ 35 struct soc_gpio_pinctrl { 36 uint32_t pinmux; 37 uint32_t pincfg; 38 }; 39 40 /** 41 * @brief helper to extract IO port number from STM32_PINMUX() encoded 42 * value 43 */ 44 #define STM32_DT_PINMUX_PORT(__pin) \ 45 (((__pin) >> 12) & 0xf) 46 47 /** 48 * @brief helper to extract IO pin number from STM32_PINMUX() encoded 49 * value 50 */ 51 #define STM32_DT_PINMUX_LINE(__pin) \ 52 (((__pin) >> 8) & 0xf) 53 54 /** 55 * @brief helper to extract IO pin func from STM32_PINMUX() encoded 56 * value 57 */ 58 #if DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) 59 #define STM32_DT_PINMUX_FUNC(__pin) \ 60 (((__pin) >> 6) & 0x3) 61 #else 62 #define STM32_DT_PINMUX_FUNC(__pin) \ 63 ((__pin) & 0xff) 64 #endif 65 66 #if DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) 67 /** 68 * @brief helper to extract IO pin remap from STM32_PINMUX() encoded 69 * value 70 */ 71 #define STM32_DT_PINMUX_REMAP(__pin) \ 72 ((__pin) & 0x1fU) 73 #endif 74 75 /** 76 * @brief helper to extract IO port number from STM32PIN() encoded 77 * value 78 */ 79 #define STM32_PORT(__pin) \ 80 ((__pin) >> 4) 81 82 /** 83 * @brief helper to extract IO pin number from STM32PIN() encoded 84 * value 85 */ 86 #define STM32_PIN(__pin) \ 87 ((__pin) & 0xf) 88 89 /** 90 * @brief helper for configuration of IO pin 91 * 92 * @param pin IO pin, STM32PIN() encoded 93 * @param func IO function encoded 94 * @param clk clock control device, for enabling/disabling clock gate 95 * for the port 96 */ 97 int z_pinmux_stm32_set(uint32_t pin, uint32_t func); 98 99 /** 100 * @brief helper for obtaining pin configuration for the board 101 * 102 * @param[out] pins set to the number of pins in the array 103 * 104 * Obtain pin assignment/configuration for current board. This call 105 * needs to be implemented at the board integration level. After 106 * restart all pins are already configured as GPIO and can be skipped 107 * in the configuration array. Pin numbers in @pin_num field are 108 * STM32PIN() encoded. 109 * 110 */ 111 void stm32_setup_pins(const struct pin_config *pinconf, 112 size_t pins); 113 114 /** 115 * @brief helper for converting dt stm32 pinctrl format to existing pin config 116 * format 117 * 118 * @param *pinctrl pointer to soc_gpio_pinctrl list 119 * @param list_size list size 120 * @param base device base register value 121 * 122 * @return 0 on success, -EINVAL otherwise 123 */ 124 int stm32_dt_pinctrl_configure(const struct soc_gpio_pinctrl *pinctrl, 125 size_t list_size, uint32_t base); 126 127 #if DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) 128 /** 129 * @brief Helper function to check and apply provided pinctrl remap 130 * configuration 131 * 132 * Check operation verifies that pin remapping configuration is the same on all 133 * pins. If configuration is valid AFIO clock is enabled and remap is applied 134 * 135 * @param *pinctrl pointer to soc_gpio_pinctrl list 136 * @param list_size list size 137 * @param base device base register value 138 * 139 * @return 0 value on success, -EINVAL otherwise 140 */ 141 int stm32_dt_pinctrl_remap(const struct soc_gpio_pinctrl *pinctrl, 142 size_t list_size, uint32_t base); 143 #endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) */ 144 145 #ifdef __cplusplus 146 } 147 #endif 148 149 #endif /* ZEPHYR_DRIVERS_PINMUX_STM32_PINMUX_STM32_H_ */ 150
