1 /*
2  * Copyright (c) 2020 Intel Corporation
3  * SPDX-License-Identifier: Apache-2.0
4  */
5 
6 #ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_INTEL_VTD_H_
7 #define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_INTEL_VTD_H_
8 
9 #define VTD_INT_SHV	BIT(3)
10 #define VTD_INT_FORMAT	BIT(4)
11 
12 /* We don't care about int_idx[15], since the size is fixed to 256,
13  * it's always 0
14  */
15 #define VTD_MSI_MAP(int_idx) \
16 	((0x0FEE << 20) | (int_idx << 5) | VTD_INT_SHV | VTD_INT_FORMAT)
17 
18 /* Interrupt Remapping Table Entry (IRTE) for Remapped Interrupts */
19 struct vtd_irte {
20 	struct {
21 		uint64_t present		: 1;
22 		uint64_t fpd			: 1;
23 		uint64_t dst_mode		: 1;
24 		uint64_t redirection_hint	: 1;
25 		uint64_t trigger_mode		: 1;
26 		uint64_t delivery_mode		: 3;
27 		uint64_t available		: 4;
28 		uint64_t _reserved_0		: 3;
29 		uint64_t irte_mode		: 1;
30 		uint64_t vector			: 8;
31 		uint64_t _reserved_1		: 8;
32 		uint64_t dst_id			: 32;
33 	} l;
34 
35 	struct {
36 		uint64_t src_id			: 16;
37 		uint64_t src_id_qualifier	: 2;
38 		uint64_t src_validation_type	: 2;
39 		uint64_t _reserved		: 44;
40 	} h;
41 } __packed;
42 
43 /* The table must be 4KB aligned, which is exactly 256 entries.
44  * And since we allow only 256 entries as a maximum: let's align to it.
45  */
46 #define IRTE_NUM 256
47 #define IRTA_SIZE 7  /* size = 2^(X+1) where IRTA_SIZE is X 2^8 = 256 */
48 
49 struct vtd_ictl_data {
50 	struct vtd_irte irte[IRTE_NUM];
51 	int irte_num_used;
52 };
53 
54 struct vtd_ictl_cfg {
55 	DEVICE_MMIO_ROM;
56 };
57 
58 #endif /* ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_INTEL_VTD_H_ */
59