1 /* ieee802154_cc1200.h - Registers definition for TI CC1200 */
2 
3 /*
4  * Copyright (c) 2017 Intel Corporation.
5  *
6  * SPDX-License-Identifier: Apache-2.0
7  */
8 
9 #ifndef ZEPHYR_DRIVERS_IEEE802154_IEEE802154_CC1200_H_
10 #define ZEPHYR_DRIVERS_IEEE802154_IEEE802154_CC1200_H_
11 
12 #include <linker/sections.h>
13 #include <sys/atomic.h>
14 #include <drivers/spi.h>
15 
16 #include <drivers/ieee802154/cc1200.h>
17 
18 /* Note for EMK & EM adapter booster pack users:
19  * SPI pins are easy, RESET as well, but when it comes to GPIO:
20  * CHIP -> EM adapter
21  * GPIO0 -> GPIOA
22  * GPIO1 -> reserved (it's SPI MISO)
23  * GPIO2 -> GPIOB
24  * GPIO3 -> GPIO3
25  */
26 
27 enum cc1200_gpio_index {
28 	CC1200_GPIO_IDX_GPIO0,
29 	CC1200_GPIO_IDX_MAX,
30 };
31 
32 struct cc1200_gpio_configuration {
33 	const struct device *dev;
34 	uint32_t pin;
35 };
36 
37 /* Runtime context structure
38  ***************************
39  */
40 
41 struct cc1200_context {
42 	struct net_if *iface;
43 	/**************************/
44 	struct cc1200_gpio_configuration gpios[CC1200_GPIO_IDX_MAX];
45 	struct gpio_callback rx_tx_cb;
46 	const struct device *spi;
47 	struct spi_config spi_cfg;
48 	uint8_t mac_addr[8];
49 	/************RF************/
50 	const struct cc1200_rf_registers_set *rf_settings;
51 	/************TX************/
52 	struct k_sem tx_sync;
53 	atomic_t tx;
54 	atomic_t tx_start;
55 	/************RX************/
56 	K_KERNEL_STACK_MEMBER(rx_stack,
57 			      CONFIG_IEEE802154_CC1200_RX_STACK_SIZE);
58 	struct k_thread rx_thread;
59 	struct k_sem rx_lock;
60 	atomic_t rx;
61 };
62 
63 #include "ieee802154_cc1200_regs.h"
64 
65 /* Registers useful routines
66  ***************************
67  */
68 
69 bool z_cc1200_access_reg(struct cc1200_context *ctx, bool read, uint8_t addr,
70 			void *data, size_t length, bool extended, bool burst);
71 
cc1200_read_single_reg(struct cc1200_context * ctx,uint8_t addr,bool extended)72 static inline uint8_t cc1200_read_single_reg(struct cc1200_context *ctx,
73 					   uint8_t addr, bool extended)
74 {
75 	uint8_t val;
76 
77 	if (z_cc1200_access_reg(ctx, true, addr, &val, 1, extended, false)) {
78 		return val;
79 	}
80 
81 	return 0;
82 }
83 
cc1200_write_single_reg(struct cc1200_context * ctx,uint8_t addr,uint8_t val,bool extended)84 static inline bool cc1200_write_single_reg(struct cc1200_context *ctx,
85 					    uint8_t addr, uint8_t val, bool extended)
86 {
87 	return z_cc1200_access_reg(ctx, false, addr, &val, 1, extended, false);
88 }
89 
cc1200_instruct(struct cc1200_context * ctx,uint8_t addr)90 static inline bool cc1200_instruct(struct cc1200_context *ctx, uint8_t addr)
91 {
92 	return z_cc1200_access_reg(ctx, false, addr, NULL, 0, false, false);
93 }
94 
95 #define DEFINE_REG_READ(__reg_name, __reg_addr, __ext)			\
96 	static inline uint8_t read_reg_##__reg_name(struct cc1200_context *ctx) \
97 	{								\
98 		return cc1200_read_single_reg(ctx, __reg_addr, __ext);	\
99 	}
100 
101 #define DEFINE_REG_WRITE(__reg_name, __reg_addr, __ext)			\
102 	static inline bool write_reg_##__reg_name(struct cc1200_context *ctx, \
103 						  uint8_t val)		\
104 	{								\
105 		return cc1200_write_single_reg(ctx, __reg_addr,	\
106 						val, __ext);		\
107 	}
108 
109 DEFINE_REG_WRITE(iocfg3, CC1200_REG_IOCFG3, false)
110 DEFINE_REG_WRITE(iocfg2, CC1200_REG_IOCFG2, false)
111 DEFINE_REG_WRITE(iocfg0, CC1200_REG_IOCFG0, false)
112 DEFINE_REG_WRITE(pa_cfg1, CC1200_REG_PA_CFG1, false)
113 DEFINE_REG_WRITE(pkt_len, CC1200_REG_PKT_LEN, false)
114 
115 DEFINE_REG_READ(fs_cfg, CC1200_REG_FS_CFG, false)
116 DEFINE_REG_READ(rssi0, CC1200_REG_RSSI0, true)
117 DEFINE_REG_READ(pa_cfg1, CC1200_REG_PA_CFG1, false)
118 DEFINE_REG_READ(num_txbytes, CC1200_REG_NUM_TXBYTES, true)
119 DEFINE_REG_READ(num_rxbytes, CC1200_REG_NUM_RXBYTES, true)
120 
121 
122 /* Instructions useful routines
123  ******************************
124  */
125 
126 #define DEFINE_STROBE_INSTRUCTION(__ins_name, __ins_addr)		\
127 	static inline bool instruct_##__ins_name(struct cc1200_context *ctx) \
128 	{								\
129 		return cc1200_instruct(ctx, __ins_addr);		\
130 	}
131 
132 DEFINE_STROBE_INSTRUCTION(sres, CC1200_INS_SRES)
133 DEFINE_STROBE_INSTRUCTION(sfstxon, CC1200_INS_SFSTXON)
134 DEFINE_STROBE_INSTRUCTION(sxoff, CC1200_INS_SXOFF)
135 DEFINE_STROBE_INSTRUCTION(scal, CC1200_INS_SCAL)
136 DEFINE_STROBE_INSTRUCTION(srx, CC1200_INS_SRX)
137 DEFINE_STROBE_INSTRUCTION(stx, CC1200_INS_STX)
138 DEFINE_STROBE_INSTRUCTION(sidle, CC1200_INS_SIDLE)
139 DEFINE_STROBE_INSTRUCTION(safc, CC1200_INS_SAFC)
140 DEFINE_STROBE_INSTRUCTION(swor, CC1200_INS_SWOR)
141 DEFINE_STROBE_INSTRUCTION(spwd, CC1200_INS_SPWD)
142 DEFINE_STROBE_INSTRUCTION(sfrx, CC1200_INS_SFRX)
143 DEFINE_STROBE_INSTRUCTION(sftx, CC1200_INS_SFTX)
144 DEFINE_STROBE_INSTRUCTION(sworrst, CC1200_INS_SWORRST)
145 DEFINE_STROBE_INSTRUCTION(snop, CC1200_INS_SNOP)
146 
147 #endif /* ZEPHYR_DRIVERS_IEEE802154_IEEE802154_CC1200_H_ */
148