1 /* 2 * Copyright (c) 2018 STMicroelectronics 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #ifndef _STM32_I2S_H_ 8 #define _STM32_I2S_H_ 9 10 #ifdef CONFIG_I2S_STM32_USE_PLLI2S_ENABLE 11 12 #if defined(RCC_CFGR_I2SSRC) 13 /* single selector for the I2S clock source (SEL_1 == SEL_2) */ 14 #define CLK_SEL_1 LL_RCC_I2S1_CLKSOURCE_PLLI2S 15 #define CLK_SEL_2 LL_RCC_I2S1_CLKSOURCE_PLLI2S 16 #else 17 #if defined(RCC_DCKCFGR_I2SSRC) 18 /* single selector for the I2S clock source (SEL_1 == SEL_2) */ 19 #define CLK_SEL_1 LL_RCC_I2S1_CLKSOURCE_PLL 20 #define CLK_SEL_2 LL_RCC_I2S1_CLKSOURCE_PLL 21 #else 22 #if defined(RCC_DCKCFGR_I2S1SRC) && defined(RCC_DCKCFGR_I2S2SRC) 23 /* double selector for the I2S clock source (SEL_1 != SEL_2) */ 24 #define CLK_SEL_1 LL_RCC_I2S1_CLKSOURCE_PLLI2S 25 #define CLK_SEL_2 LL_RCC_I2S2_CLKSOURCE_PLLI2S 26 #endif /* RCC_DCKCFGR_I2S1SRC && RCC_DCKCFGR_I2S2SRC */ 27 #endif /* RCC_DCKCFGR_I2SSRC */ 28 #endif /* RCC_CFGR_I2SSRC */ 29 30 #else 31 32 #if defined(RCC_CFGR_I2SSRC) 33 /* single selector for the I2S clock source (SEL_1 == SEL_2) */ 34 #define CLK_SEL_1 LL_RCC_I2S1_CLKSOURCE_PIN 35 #define CLK_SEL_2 LL_RCC_I2S1_CLKSOURCE_PIN 36 #else 37 #if defined(RCC_DCKCFGR_I2SSRC) 38 /* single selector for the I2S clock source (SEL_1 == SEL_2) */ 39 #define CLK_SEL_1 LL_RCC_I2S1_CLKSOURCE_PLLSRC 40 #define CLK_SEL_2 LL_RCC_I2S1_CLKSOURCE_PLLSRC 41 #else 42 #if defined(RCC_DCKCFGR_I2S1SRC) && defined(RCC_DCKCFGR_I2S2SRC) 43 /* double selector for the I2S clock source (SEL_1 != SEL_2) */ 44 #define CLK_SEL_1 LL_RCC_I2S1_CLKSOURCE_PLLSRC 45 #define CLK_SEL_2 LL_RCC_I2S2_CLKSOURCE_PLLSRC 46 #endif /* RCC_DCKCFGR_I2S1SRC && RCC_DCKCFGR_I2S2SRC */ 47 #endif /* RCC_DCKCFGR_I2SSRC */ 48 #endif /* RCC_CFGR_I2SSRC */ 49 50 #endif /* CONFIG_I2S_STM32_USE_PLLI2S_ENABLE */ 51 52 #define DEV_CFG(dev) \ 53 (const struct i2s_stm32_cfg * const)((dev)->config) 54 #define DEV_DATA(dev) \ 55 ((struct i2s_stm32_data *const)(dev)->data) 56 57 struct queue_item { 58 void *mem_block; 59 size_t size; 60 }; 61 62 /* Minimal ring buffer implementation */ 63 struct ring_buf { 64 struct queue_item *buf; 65 uint16_t len; 66 uint16_t head; 67 uint16_t tail; 68 }; 69 70 /* Device constant configuration parameters */ 71 struct i2s_stm32_cfg { 72 SPI_TypeDef *i2s; 73 struct stm32_pclken pclken; 74 uint32_t i2s_clk_sel; 75 const struct soc_gpio_pinctrl *pinctrl_list; 76 size_t pinctrl_list_size; 77 void (*irq_config)(const struct device *dev); 78 }; 79 80 struct stream { 81 int32_t state; 82 struct k_sem sem; 83 84 const struct device *dev_dma; 85 uint32_t dma_channel; 86 struct dma_config dma_cfg; 87 uint8_t priority; 88 bool src_addr_increment; 89 bool dst_addr_increment; 90 uint8_t fifo_threshold; 91 92 struct i2s_config cfg; 93 struct ring_buf mem_block_queue; 94 void *mem_block; 95 bool last_block; 96 bool master; 97 int (*stream_start)(struct stream *, const struct device *dev); 98 void (*stream_disable)(struct stream *, const struct device *dev); 99 void (*queue_drop)(struct stream *); 100 }; 101 102 /* Device run time data */ 103 struct i2s_stm32_data { 104 struct stream rx; 105 struct stream tx; 106 }; 107 108 #endif /* _STM32_I2S_H_ */ 109
