1 /* 2 * Copyright (c) 2020 Stephanos Ioannidis <root@stephanos.io> 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #ifndef ZEPHYR_DRIVERS_ETHERNET_ETH_SAM0_GMAC_H_ 8 #define ZEPHYR_DRIVERS_ETHERNET_ETH_SAM0_GMAC_H_ 9 10 /* 11 * Map the SAM-family DFP GMAC register names to the SAM0-family DFP GMAC 12 * register names. 13 */ 14 #define GMAC_NCR NCR.reg 15 #define GMAC_NCFGR NCFGR.reg 16 #define GMAC_NSR NSR.reg 17 #define GMAC_UR UR.reg 18 #define GMAC_DCFGR DCFGR.reg 19 #define GMAC_TSR TSR.reg 20 #define GMAC_RBQB RBQB.reg 21 #define GMAC_TBQB TBQB.reg 22 #define GMAC_RSR RSR.reg 23 #define GMAC_ISR ISR.reg 24 #define GMAC_IER IER.reg 25 #define GMAC_IDR IDR.reg 26 #define GMAC_IMR IMR.reg 27 #define GMAC_MAN MAN.reg 28 #define GMAC_RPQ RPQ.reg 29 #define GMAC_TPQ TPQ.reg 30 #define GMAC_TPSF TPSF.reg 31 #define GMAC_RPSF RPSF.reg 32 #define GMAC_RJFML RJFML.reg 33 #define GMAC_HRB HRB.reg 34 #define GMAC_HRT HRT.reg 35 #define GMAC_SA Sa 36 #define GMAC_WOL WOL.reg 37 #define GMAC_IPGS IPGS.reg 38 #define GMAC_SVLAN SVLAN.reg 39 #define GMAC_TPFCP TPFCP.reg 40 #define GMAC_SAMB1 SAMB1.reg 41 #define GMAC_SAMT1 SAMT1.reg 42 #define GMAC_NSC NSC.reg 43 #define GMAC_SCL SCL.reg 44 #define GMAC_SCH SCH.reg 45 #define GMAC_EFTSH EFTSH.reg 46 #define GMAC_EFRSH EFRSH.reg 47 #define GMAC_PEFTSH PEFTSH.reg 48 #define GMAC_PEFRSH PEFRSH.reg 49 #define GMAC_OTLO OTLO.reg 50 #define GMAC_OTHI OTHI.reg 51 #define GMAC_FT FT.reg 52 #define GMAC_BCFT BCFT.reg 53 #define GMAC_MFT MFT.reg 54 #define GMAC_PFT PFT.reg 55 #define GMAC_BFT64 BFT64.reg 56 #define GMAC_TBFT127 TBFT127.reg 57 #define GMAC_TBFT255 TBFT255.reg 58 #define GMAC_TBFT511 TBFT511.reg 59 #define GMAC_TBFT1023 TBFT1023.reg 60 #define GMAC_TBFT1518 TBFT1518.reg 61 #define GMAC_GTBFT1518 GTBFT1518.reg 62 #define GMAC_TUR TUR.reg 63 #define GMAC_SCF SCF.reg 64 #define GMAC_MCF MCF.reg 65 #define GMAC_EC EC.reg 66 #define GMAC_LC LC.reg 67 #define GMAC_DTF DTF.reg 68 #define GMAC_CSE CSE.reg 69 #define GMAC_ORLO ORLO.reg 70 #define GMAC_ORHI ORHI.reg 71 #define GMAC_FR FR.reg 72 #define GMAC_BCFR BCFR.reg 73 #define GMAC_MFR MFR.reg 74 #define GMAC_PFR PFR.reg 75 #define GMAC_BFR64 BFR64.reg 76 #define GMAC_TBFR127 TBFR127.reg 77 #define GMAC_TBFR255 TBFR255.reg 78 #define GMAC_TBFR511 TBFR511.reg 79 #define GMAC_TBFR1023 TBFR1023.reg 80 #define GMAC_TBFR1518 TBFR1518.reg 81 #define GMAC_TMXBFR TMXBFR.reg 82 #define GMAC_UFR UFR.reg 83 #define GMAC_OFR OFR.reg 84 #define GMAC_JR JR.reg 85 #define GMAC_FCSE FCSE.reg 86 #define GMAC_LFFE LFFE.reg 87 #define GMAC_RSE RSE.reg 88 #define GMAC_AE AE.reg 89 #define GMAC_RRE RRE.reg 90 #define GMAC_ROE ROE.reg 91 #define GMAC_IHCE IHCE.reg 92 #define GMAC_TCE TCE.reg 93 #define GMAC_UCE UCE.reg 94 #define GMAC_TISUBN TISUBN.reg 95 #define GMAC_TSH TSH.reg 96 #define GMAC_TSSSL TSSSL.reg 97 #define GMAC_TSSN TSSN.reg 98 #define GMAC_TSL TSL.reg 99 #define GMAC_TN TN.reg 100 #define GMAC_TA TA.reg 101 #define GMAC_TI TI.reg 102 #define GMAC_EFTSL EFTSL.reg 103 #define GMAC_EFTN EFTN.reg 104 #define GMAC_EFRSL EFRSL.reg 105 #define GMAC_EFRN EFRN.reg 106 #define GMAC_PEFTSL PEFTSL.reg 107 #define GMAC_PEFTN PEFTN.reg 108 #define GMAC_PEFRSL PEFRSL.reg 109 #define GMAC_PEFRN PEFRN.reg 110 #define GMAC_RLPITR RLPITR.reg 111 #define GMAC_RLPITI RLPITI.reg 112 #define GMAC_TLPITR TLPITR.reg 113 #define GMAC_TLPITI TLPITI.reg 114 115 #define GMAC_SAB SAB.reg 116 #define GMAC_SAT SAT.reg 117 118 /* 119 * Define the register field value symbols that are missing in the SAM0-family 120 * DFP GMAC headers. 121 */ 122 #define GMAC_NCFGR_CLK_MCK_8 GMAC_NCFGR_CLK(0) 123 #define GMAC_NCFGR_CLK_MCK_16 GMAC_NCFGR_CLK(1) 124 #define GMAC_NCFGR_CLK_MCK_32 GMAC_NCFGR_CLK(2) 125 #define GMAC_NCFGR_CLK_MCK_48 GMAC_NCFGR_CLK(3) 126 #define GMAC_NCFGR_CLK_MCK_64 GMAC_NCFGR_CLK(4) 127 #define GMAC_NCFGR_CLK_MCK_96 GMAC_NCFGR_CLK(5) 128 129 #define GMAC_DCFGR_FBLDO_SINGLE GMAC_DCFGR_FBLDO(1) 130 #define GMAC_DCFGR_FBLDO_INCR4 GMAC_DCFGR_FBLDO(2) 131 #define GMAC_DCFGR_FBLDO_INCR8 GMAC_DCFGR_FBLDO(3) 132 #define GMAC_DCFGR_FBLDO_INCR16 GMAC_DCFGR_FBLDO(4) 133 134 #endif /* ZEPHYR_DRIVERS_ETHERNET_ETH_SAM0_GMAC_H_ */ 135
