1 /*
2  * Copyright (c) 2019 Richard Osterloh <richard.osterloh@gmail.com>
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 
8 #include <soc.h>
9 #include <stm32_ll_bus.h>
10 #include <stm32_ll_pwr.h>
11 #include <stm32_ll_rcc.h>
12 #include <stm32_ll_utils.h>
13 #include <drivers/clock_control.h>
14 #include <sys/util.h>
15 #include <drivers/clock_control/stm32_clock_control.h>
16 #include "clock_stm32_ll_common.h"
17 
18 
19 #if STM32_SYSCLK_SRC_PLL
20 
21 /* Macros to fill up division factors values */
22 #define z_pllm(v) LL_RCC_PLLM_DIV_ ## v
23 #define pllm(v) z_pllm(v)
24 
25 #define z_pllr(v) LL_RCC_PLLR_DIV_ ## v
26 #define pllr(v) z_pllr(v)
27 
28 /**
29  * @brief fill in pll configuration structure
30  */
config_pll_init(LL_UTILS_PLLInitTypeDef * pllinit)31 void config_pll_init(LL_UTILS_PLLInitTypeDef *pllinit)
32 {
33 	pllinit->PLLM = pllm(STM32_PLL_M_DIVISOR);
34 	pllinit->PLLN = STM32_PLL_N_MULTIPLIER;
35 	pllinit->PLLR = pllr(STM32_PLL_R_DIVISOR);
36 
37 	/* set power boost mode for sys clock greater than 150MHz */
38 	if (sys_clock_hw_cycles_per_sec() >= MHZ(150)) {
39 		LL_PWR_EnableRange1BoostMode();
40 	}
41 }
42 #endif /* STM32_SYSCLK_SRC_PLL */
43 
44 /**
45  * @brief Activate default clocks
46  */
config_enable_default_clocks(void)47 void config_enable_default_clocks(void)
48 {
49 	/* Enable the power interface clock */
50 	LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
51 
52 #if STM32_LSE_CLOCK
53 	/* LSE belongs to the back-up domain, enable access.*/
54 
55 	/* Set the DBP bit in the Power control register 1 (PWR_CR1) */
56 	LL_PWR_EnableBkUpAccess();
57 	while (!LL_PWR_IsEnabledBkUpAccess()) {
58 		/* Wait for Backup domain access */
59 	}
60 
61 	/* Enable LSE Oscillator (32.768 kHz) */
62 	LL_RCC_LSE_Enable();
63 	while (!LL_RCC_LSE_IsReady()) {
64 		/* Wait for LSE ready */
65 	}
66 
67 	LL_PWR_DisableBkUpAccess();
68 #endif
69 }
70 
71 /**
72  * @brief Function kept for driver genericity
73  */
LL_RCC_MSI_Disable(void)74 void LL_RCC_MSI_Disable(void)
75 {
76 	/* Do nothing */
77 }
78