1/*
2 * Copyright (c) 2021 Telink Semiconductor
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8
9#include <telink_b91.dtsi>
10
11/ {
12	model = "telink,b91";
13	compatible = "telink,tlsr9518adk80d";
14
15	aliases {
16		led0 = &led_blue;
17		led1 = &led_green;
18		sw0 = &key_1;
19		pwm-led0 = &pwm_led_blue;
20		pwm-0 = &pwm0;
21	};
22
23	leds {
24		compatible = "gpio-leds";
25
26		led_blue: led_0 {
27			gpios = <&gpiob 4 GPIO_ACTIVE_HIGH>;
28			label = "LED Blue";
29		};
30
31		led_green: led_1 {
32			gpios = <&gpiob 5 GPIO_ACTIVE_HIGH>;
33			label = "LED Green";
34		};
35
36		led_white: led_2 {
37			gpios = <&gpiob 6 GPIO_ACTIVE_HIGH>;
38			label = "LED White";
39		};
40
41		led_red: led_3 {
42			gpios = <&gpiob 7 GPIO_ACTIVE_HIGH>;
43			label = "LED Red";
44		};
45	};
46
47	pwm_leds {
48		compatible = "pwm-leds";
49
50		pwm_led_blue: pwm_led_0 {
51			pwms = <&pwm0 0 0>;
52			label = "PWM LED Blue";
53		};
54	};
55
56	keys {
57		compatible = "gpio-keys";
58		key_1: button_1 {
59			label = "User KEY1";
60			gpios = <&gpioc 2 GPIO_PULL_DOWN>;
61		};
62	};
63
64	chosen {
65		zephyr,console = &uart0;
66		zephyr,shell-uart = &uart0;
67		zephyr,sram = &ram_dlm;
68		zephyr,flash = &flash;
69		zephyr,flash-controller = &flash_mspi;
70		zephyr,entropy = &trng0;
71	};
72};
73
74&cpu0 {
75	clock-frequency = <48000000>;
76};
77
78&ram_ilm {
79	reg = <0x00000000 0x00020000>;
80};
81
82&ram_dlm {
83	reg = <0x00080000 0x00020000>;
84};
85
86&flash {
87	reg = <0x20000000 0x100000>;
88};
89
90&gpiob {
91	status = "okay";
92};
93
94&gpioc {
95	interrupts = <25 1>;
96	status = "okay";
97};
98
99&pinmux {
100	status = "okay";
101	pad-mul-sel = <1>;
102};
103
104&uart0 {
105	status = "okay";
106	current-speed = <115200>;
107	pinctrl-0 = <&uart0_tx_pb2 &uart0_rx_pb3>;
108};
109
110&trng0 {
111	status = "okay";
112};
113
114&ieee802154 {
115	status = "okay";
116};
117
118&pwm0 {
119	status = "okay";
120	clock-frequency = <93750>;
121	pinctrl-0 = <&pwm_ch0_pb4>;
122};
123
124&pspi {
125	status = "okay";
126	cs0-pin = "PSPI_CSN_PC4";
127	pinctrl-0 = <&pspi_clk_pc5 &pspi_miso_io1_pc6 &pspi_mosi_io0_pc7>;
128};
129
130&hspi {
131	status = "okay";
132	cs0-pin = "HSPI_CSN_PA1";
133	pinctrl-0 = <&hspi_clk_pa2 &hspi_miso_io1_pa3 &hspi_mosi_io0_pa4>;
134};
135
136&i2c {
137	status = "okay";
138	clock-frequency = <I2C_BITRATE_FAST>;
139	pinctrl-0 = <&i2c_scl_pe1 &i2c_sda_pe3>;
140};
141
142&flash_mspi {
143	partitions {
144		compatible = "fixed-partitions";
145		#address-cells = <1>;
146		#size-cells = <1>;
147
148		boot_partition: partition@0 {
149			label = "mcuboot";
150			reg = <0x00000000 0x8000>;
151		};
152		slot0_partition: partition@8000 {
153			label = "image-0";
154			reg = <0x00008000 0x1a000>;
155		};
156		slot1_partition: partition@22000 {
157			label = "image-1";
158			reg = <0x00022000 0x1a000>;
159		};
160		scratch_partition: partition@3c000 {
161			label = "image-scratch";
162			reg = <0x0003c000 0x2000>;
163		};
164		storage_partition: partition@f0000 {
165			label = "storage";
166			reg = <0x000f0000 0x00008000>;
167			/* region 0x000f8000 .. 0x000FFFFF
168			 * is reserved for factory calibration
169			 */
170		};
171	};
172};
173