1 /* 2 * Copyright (c) 2016 Linaro Limited 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #include <device.h> 8 #include <init.h> 9 #include <kernel.h> 10 #include <drivers/pinmux.h> 11 #include <soc.h> 12 #include <sys/sys_io.h> 13 #include <gpio/gpio_cmsdk_ahb.h> 14 15 /** 16 * @brief Pinmux driver for ARM V2M Beetle Board 17 * 18 * The ARM V2M Beetle Board has 4 GPIO controllers. These controllers 19 * are responsible for pin muxing, input/output, pull-up, etc. 20 * 21 * The GPIO controllers 2 and 3 are reserved and therefore not exposed by 22 * this driver. 23 * 24 * All GPIO controller exposed pins are exposed via the following sequence of 25 * pin numbers: 26 * Pins 0 - 15 are for GPIO0 27 * Pins 16 - 31 are for GPIO1 28 * 29 * For the exposed GPIO controllers ARM V2M Beetle Board follows the Arduino 30 * compliant pin out. 31 */ 32 33 #define CMSDK_AHB_GPIO0_DEV \ 34 ((volatile struct gpio_cmsdk_ahb *)DT_REG_ADDR(DT_NODELABEL(gpio0))) 35 #define CMSDK_AHB_GPIO1_DEV \ 36 ((volatile struct gpio_cmsdk_ahb *)DT_REG_ADDR(DT_NODELABEL(gpio1))) 37 38 /* 39 * This is the mapping from the ARM V2M Beetle Board pins to GPIO 40 * controllers. 41 * 42 * D0 : P0_0 43 * D1 : P0_1 44 * D2 : P0_2 45 * D3 : P0_3 46 * D4 : P0_4 47 * D5 : P0_5 48 * D6 : P0_6 49 * D7 : P0_7 50 * D8 : P0_8 51 * D9 : P0_9 52 * D10 : P0_10 53 * D11 : P0_11 54 * D12 : P0_12 55 * D13 : P0_13 56 * D14 : P0_14 57 * D15 : P0_15 58 * D16 : P1_0 59 * D17 : P1_1 60 * D18 : P1_2 61 * D19 : P1_3 62 * D20 : P1_4 63 * D21 : P1_5 64 * D22 : P1_6 65 * D23 : P1_7 66 * D24 : P1_8 67 * D25 : P1_9 68 * D26 : P1_10 69 * D27 : P1_11 70 * D28 : P1_12 71 * D29 : P1_13 72 * D30 : P1_14 73 * D31 : P1_15 74 * 75 * UART_0_RX : D0 76 * UART_0_TX : D1 77 * SPI_0_CS : D10 78 * SPI_0_MOSI : D11 79 * SPI_0_MISO : D12 80 * SPI_0_SCLK : D13 81 * I2C_0_SCL : D14 82 * I2C_0_SDA : D15 83 * UART_1_RX : D16 84 * UART_1_TX : D17 85 * SPI_1_CS : D18 86 * SPI_1_MOSI : D19 87 * SPI_1_MISO : D20 88 * SPI_1_SCK : D21 89 * I2C_1_SDA : D22 90 * I2C_1_SCL : D23 91 * 92 */ arm_v2m_beetle_pinmux_defaults(void)93static void arm_v2m_beetle_pinmux_defaults(void) 94 { 95 uint32_t gpio_0 = 0U; 96 uint32_t gpio_1 = 0U; 97 98 /* Set GPIO Alternate Functions */ 99 100 gpio_0 = (1<<0); /* Shield 0 UART 0 RXD */ 101 gpio_0 |= (1<<1); /* Shield 0 UART 0 TXD */ 102 gpio_0 |= (1<<14); /* Shield 0 I2C SDA SBCON2 */ 103 gpio_0 |= (1<<15); /* Shield 0 I2C SCL SBCON2 */ 104 gpio_0 |= (1<<10); /* Shield 0 SPI_3 nCS */ 105 gpio_0 |= (1<<11); /* Shield 0 SPI_3 MOSI */ 106 gpio_0 |= (1<<12); /* Shield 0 SPI_3 MISO */ 107 gpio_0 |= (1<<13); /* Shield 0 SPI_3 SCK */ 108 109 CMSDK_AHB_GPIO0_DEV->altfuncset = gpio_0; 110 111 gpio_1 = (1<<0); /* UART 1 RXD */ 112 gpio_1 |= (1<<1); /* UART 1 TXD */ 113 gpio_1 |= (1<<6); /* Shield 1 I2C SDA */ 114 gpio_1 |= (1<<7); /* Shield 1 I2C SCL */ 115 gpio_1 |= (1<<2); /* ADC SPI_1 nCS */ 116 gpio_1 |= (1<<3); /* ADC SPI_1 MOSI */ 117 gpio_1 |= (1<<4); /* ADC SPI_1 MISO */ 118 gpio_1 |= (1<<5); /* ADC SPI_1 SCK */ 119 120 gpio_1 |= (1<<8); /* QSPI CS 2 */ 121 gpio_1 |= (1<<9); /* QSPI CS 1 */ 122 gpio_1 |= (1<<10); /* QSPI IO 0 */ 123 gpio_1 |= (1<<11); /* QSPI IO 1 */ 124 gpio_1 |= (1<<12); /* QSPI IO 2 */ 125 gpio_1 |= (1<<13); /* QSPI IO 3 */ 126 gpio_1 |= (1<<14); /* QSPI SCK */ 127 128 CMSDK_AHB_GPIO1_DEV->altfuncset = gpio_1; 129 130 /* Set the ARD_PWR_EN GPIO1[15] as an output */ 131 CMSDK_AHB_GPIO1_DEV->outenableset |= (0x1 << 15); 132 /* Set on 3v3 (for ARDUINO HDR compliancy) */ 133 CMSDK_AHB_GPIO1_DEV->data |= (0x1 << 15); 134 } 135 arm_v2m_beetle_pinmux_init(const struct device * port)136static int arm_v2m_beetle_pinmux_init(const struct device *port) 137 { 138 ARG_UNUSED(port); 139 140 arm_v2m_beetle_pinmux_defaults(); 141 142 return 0; 143 } 144 145 SYS_INIT(arm_v2m_beetle_pinmux_init, PRE_KERNEL_1, 146 CONFIG_KERNEL_INIT_PRIORITY_DEFAULT); 147
