1/*
2 * Copyright (c) 2018, 2019, Synopsys, Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8
9#include "skeleton.dtsi"
10#include <mem.h>
11
12#ifndef ICCM_ADDR
13#define ICCM_ADDR 0
14#endif
15
16#ifndef ICCM_SIZE
17#define ICCM_SIZE DT_SIZE_K(1024)
18#endif
19
20#ifndef DCCM_ADDR
21#define DCCM_ADDR 80000000
22#endif
23
24#ifndef DCCM_SIZE
25#define DCCM_SIZE DT_SIZE_K(1024)
26#endif
27
28/ {
29	cpus {
30		#address-cells = <1>;
31		#size-cells = <0>;
32
33		intc: arcv2-intc {
34			compatible = "snps,arcv2-intc";
35			interrupt-controller;
36			#interrupt-cells = <2>;
37		};
38	};
39
40	iccm0: iccm@ICCM_ADDR {
41		compatible = "arc,iccm";
42		reg = <DT_ADDR(ICCM_ADDR) ICCM_SIZE>;
43	};
44
45	dccm0: dccm@DCCM_ADDR {
46		compatible = "arc,dccm";
47		reg = <DT_ADDR(DCCM_ADDR) DCCM_SIZE>;
48	};
49
50	uart0: uart@f0000000 {
51		compatible = "ns16550";
52		clock-frequency = <50000000>;
53		reg = <0xf0000000 0x400>;
54		current-speed = <115200>;
55		label = "UART_0";
56		interrupt-parent = <&intc>;
57		interrupts = <24 1>;
58	};
59
60	chosen {
61		zephyr,sram = &dccm0;
62		zephyr,console = &uart0;
63		zephyr,shell-uart = &uart0;
64	};
65};
66