1 /* 2 * Copyright (c) 2019 Intel Corp. 3 * SPDX-License-Identifier: Apache-2.0 4 */ 5 6 #ifndef _X86_OFFSETS_INC_ 7 #define _X86_OFFSETS_INC_ 8 9 GEN_OFFSET_SYM(_callee_saved_t, rsp); 10 GEN_OFFSET_SYM(_callee_saved_t, rbp); 11 GEN_OFFSET_SYM(_callee_saved_t, rbx); 12 GEN_OFFSET_SYM(_callee_saved_t, r12); 13 GEN_OFFSET_SYM(_callee_saved_t, r13); 14 GEN_OFFSET_SYM(_callee_saved_t, r14); 15 GEN_OFFSET_SYM(_callee_saved_t, r15); 16 GEN_OFFSET_SYM(_callee_saved_t, rip); 17 GEN_OFFSET_SYM(_callee_saved_t, rflags); 18 19 GEN_OFFSET_SYM(_thread_arch_t, rax); 20 GEN_OFFSET_SYM(_thread_arch_t, rcx); 21 GEN_OFFSET_SYM(_thread_arch_t, rdx); 22 GEN_OFFSET_SYM(_thread_arch_t, rsi); 23 GEN_OFFSET_SYM(_thread_arch_t, rdi); 24 GEN_OFFSET_SYM(_thread_arch_t, r8); 25 GEN_OFFSET_SYM(_thread_arch_t, r9); 26 GEN_OFFSET_SYM(_thread_arch_t, r10); 27 GEN_OFFSET_SYM(_thread_arch_t, r11); 28 GEN_OFFSET_SYM(_thread_arch_t, sse); 29 #ifdef CONFIG_USERSPACE 30 GEN_OFFSET_SYM(_thread_arch_t, ss); 31 GEN_OFFSET_SYM(_thread_arch_t, cs); 32 GEN_OFFSET_SYM(_thread_arch_t, psp); 33 #ifndef CONFIG_X86_COMMON_PAGE_TABLE 34 GEN_OFFSET_SYM(_thread_arch_t, ptables); 35 #endif 36 #endif /* CONFIG_USERSPACE */ 37 38 GEN_OFFSET_SYM(x86_tss64_t, ist1); 39 GEN_OFFSET_SYM(x86_tss64_t, ist2); 40 GEN_OFFSET_SYM(x86_tss64_t, ist6); 41 GEN_OFFSET_SYM(x86_tss64_t, ist7); 42 GEN_OFFSET_SYM(x86_tss64_t, cpu); 43 #ifdef CONFIG_USERSPACE 44 GEN_OFFSET_SYM(x86_tss64_t, psp); 45 GEN_OFFSET_SYM(x86_tss64_t, usp); 46 #endif /* CONFIG_USERSPACE */ 47 GEN_ABSOLUTE_SYM(__X86_TSS64_SIZEOF, sizeof(x86_tss64_t)); 48 49 GEN_OFFSET_SYM(x86_cpuboot_t, ready); 50 GEN_OFFSET_SYM(x86_cpuboot_t, tr); 51 GEN_OFFSET_SYM(x86_cpuboot_t, gs_base); 52 GEN_OFFSET_SYM(x86_cpuboot_t, sp); 53 GEN_OFFSET_SYM(x86_cpuboot_t, stack_size); 54 GEN_OFFSET_SYM(x86_cpuboot_t, fn); 55 GEN_OFFSET_SYM(x86_cpuboot_t, arg); 56 GEN_ABSOLUTE_SYM(__X86_CPUBOOT_SIZEOF, sizeof(x86_cpuboot_t)); 57 58 #endif /* _X86_OFFSETS_INC_ */ 59
