1# Renesas RX architecture configuration options
2
3# Copyright (c) 2020 KT-Elektronik, Klaucke und Partner GmbH
4# Copyright (c) 2024 Renesas Electronics Corporation
5# SPDX-License-Identifier: Apache-2.0
6
7menu "Renesas RX Options"
8	depends on RX
9
10config ARCH
11	string
12	default "rx"
13
14config HAS_EXCEPT_VECTOR_TABLE
15	bool
16	help
17	  Set if the processor has the exception vector table.
18
19config CPU_RXV1
20	bool
21	help
22	  Set if the processor supports the Renesas RXv1 instruction set.
23
24config CPU_RXV2
25	bool
26	select HAS_EXCEPT_VECTOR_TABLE
27	help
28	  Set if the processor supports the Renesas RXv2 instruction set.
29
30config CPU_RXV3
31	bool
32	select HAS_EXCEPT_VECTOR_TABLE
33	help
34	  Set if the processor supports the Renesas RXv3 instruction set.
35
36config XIP
37	default y
38
39config NUM_IRQ_PRIO_LEVELS
40	int "Number of supported interrupt priority levels"
41	range 1 16
42	default 16
43	help
44	  Interrupt priorities available will be 0 to NUM_IRQ_PRIO_LEVELS-1. The
45	  minimum value is 1. The BSP must provide a valid default for proper
46	  operation.
47
48config NUM_IRQS
49	int
50	default 256
51
52config GEN_ISR_TABLES
53	default y
54
55config GEN_SW_ISR_TABLE
56	default y
57
58config GEN_IRQ_VECTOR_TABLE
59	default n
60
61config GEN_IRQ_START_VECTOR
62	default 16
63
64config DYNAMIC_INTERRUPTS
65	default y
66
67config MAIN_STACK_SIZE
68	default 1024
69
70config INITIALIZATION_STACK_SIZE
71	int "Initialization stack size (in bytes)"
72	default 512
73	help
74	  Stack size for initialization process of kernel (in bytes)
75
76config HAS_MAPPED_INTERRUPTS
77	bool
78	help
79	  Support for mapped interrupts.
80
81endmenu
82