1 /*
2 * Copyright (c) 2020, Teslabs Engineering S.L.
3 * Copyright (c) 2022, Basalte bv
4 * Copyright (c) 2025, ZAL Zentrum für Angewandte Luftfahrtforschung GmbH
5 *
6 * SPDX-License-Identifier: Apache-2.0
7 */
8
9 #include <zephyr/linker/devicetree_regions.h>
10 #include <zephyr/kernel.h>
11 #include <zephyr/ztest.h>
12
13 /** Buffer size. */
14 #define BUF_SIZE_PSRAM 524288U
15 #define BUF_SIZE_SDRAM 64U
16 #define BUF_SIZE_SRAM 64U
17
18 #define BUF_DEF(label, size) static uint32_t buf_##label[(size) / sizeof(uint32_t)] \
19 Z_GENERIC_SECTION(LINKER_DT_NODE_REGION_NAME(DT_NODELABEL(label)))
20
21 /**
22 * @brief Helper function to test RAM r/w.
23 *
24 * @param mem RAM memory location to be tested.
25 */
test_ram_rw(uint32_t * mem,size_t size_byte)26 static void test_ram_rw(uint32_t *mem, size_t size_byte)
27 {
28 size_t size_32b = size_byte / sizeof(uint32_t);
29
30 /* fill memory with number range (0, BUF_SIZE - 1) */
31 for (size_t i = 0U; i < size_32b; i++) {
32 mem[i] = i;
33 }
34
35 /* check that memory contains written range */
36 for (size_t i = 0U; i < size_32b; i++) {
37 zassert_equal(mem[i], i, "Unexpected content @%p: 0x%x != 0x%zx",
38 mem + i, mem[i], i);
39 }
40 }
41
42 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sdram1))
43 BUF_DEF(sdram1, BUF_SIZE_SDRAM);
44 #endif
45 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sdram2))
46 BUF_DEF(sdram2, BUF_SIZE_SDRAM);
47 #endif
48 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sram1))
49 BUF_DEF(sram1, BUF_SIZE_SRAM);
50 #endif
51 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sram2))
52 BUF_DEF(sram2, BUF_SIZE_SRAM);
53 #endif
54 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(memc))
55 BUF_DEF(psram, BUF_SIZE_PSRAM);
56 #endif
57
58 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(ram0))
59 #define RAM_SIZE DT_REG_SIZE(DT_NODELABEL(ram0))
60 static uint32_t *buf_ram0 = (uint32_t *)DT_REG_ADDR(DT_NODELABEL(ram0));
61 #endif
62
63 ZTEST_SUITE(test_ram, NULL, NULL, NULL, NULL, NULL);
64
ZTEST(test_ram,test_sdram1)65 ZTEST(test_ram, test_sdram1)
66 {
67 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sdram1))
68 test_ram_rw(buf_sdram1, BUF_SIZE_SDRAM);
69 #else
70 ztest_test_skip();
71 #endif
72 }
73
ZTEST(test_ram,test_ram0)74 ZTEST(test_ram, test_ram0)
75 {
76 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(ram0))
77 test_ram_rw(buf_ram0, RAM_SIZE);
78 #else
79 ztest_test_skip();
80 #endif
81 }
82
ZTEST(test_ram,test_sdram2)83 ZTEST(test_ram, test_sdram2)
84 {
85 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sdram2))
86 test_ram_rw(buf_sdram2, BUF_SIZE_SDRAM);
87 #else
88 ztest_test_skip();
89 #endif
90 }
91
ZTEST(test_ram,test_sram1)92 ZTEST(test_ram, test_sram1)
93 {
94 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sram1))
95 test_ram_rw(buf_sram1, BUF_SIZE_SRAM);
96 #else
97 ztest_test_skip();
98 #endif
99 }
100
ZTEST(test_ram,test_sram2)101 ZTEST(test_ram, test_sram2)
102 {
103 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sram2))
104 test_ram_rw(buf_sram2, BUF_SIZE_SRAM);
105 #else
106 ztest_test_skip();
107 #endif
108 }
109
ZTEST(test_ram,test_psram)110 ZTEST(test_ram, test_psram)
111 {
112 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(memc))
113 test_ram_rw(buf_psram, BUF_SIZE_PSRAM);
114 #else
115 ztest_test_skip();
116 #endif
117 }
118
