1CONFIG_ZTEST=y 2 3CONFIG_ASSERT=y 4CONFIG_ASSERT_LEVEL=2 5CONFIG_ASSERT_VERBOSE=y 6 7 8CONFIG_BT=y 9CONFIG_BT_HCI=y 10 11CONFIG_BT_BUF_ACL_TX_SIZE=251 12CONFIG_BT_BUF_ACL_RX_SIZE=251 13 14CONFIG_BT_LLL_VENDOR_NORDIC=y 15 16CONFIG_BT_CENTRAL=y 17CONFIG_BT_PERIPHERAL=y 18CONFIG_BT_ISO_PERIPHERAL=y 19CONFIG_BT_ISO_CENTRAL=y 20CONFIG_BT_CTLR_PERIPHERAL_ISO=y 21CONFIG_BT_CTLR_CENTRAL_ISO=y 22 23CONFIG_BT_ASSERT=y 24CONFIG_BT_CTLR_ASSERT_HANDLER=y 25 26CONFIG_BT_CTLR_PER_INIT_FEAT_XCHG=y 27CONFIG_BT_CTLR_SCA_UPDATE=y 28CONFIG_BT_SCA_UPDATE=y 29 30CONFIG_BT_PHY_UPDATE=y 31CONFIG_BT_CTLR_PHY_2M=y 32CONFIG_BT_CTLR_PHY_CODED=y 33 34CONFIG_BT_DATA_LEN_UPDATE=y 35CONFIG_BT_CTLR_DATA_LENGTH_MAX=251 36 37CONFIG_BT_CTLR_DF=y 38CONFIG_BT_CTLR_DF_CTE_TX=y 39CONFIG_BT_CTLR_DF_CTE_RX_SAMPLE_1US=y 40CONFIG_BT_CTLR_DF_ANT_SWITCH_1US=y 41CONFIG_BT_CTLR_DF_CONN_CTE_RX=y 42CONFIG_BT_CTLR_DF_CONN_CTE_TX=y 43CONFIG_BT_CTLR_DF_CONN_CTE_REQ=y 44CONFIG_BT_CTLR_DF_CONN_CTE_RSP=y 45CONFIG_BT_CTLR_DF_ANT_SWITCH_TX=y 46CONFIG_BT_CTLR_DF_CTE_RX=y 47
