1common:
2  tags: llext
3  platform_exclude:
4    # platforms with active issues
5    - numaker_pfm_m487        # See #63167
6    - s32z2xxdc2/s32z270/rtu0 # See commit 18a0660
7    - s32z2xxdc2/s32z270/rtu1 # See commit 18a0660
8    # platforms that are always skipped by the runtime filter
9    - qemu_cortex_m0
10    - mps2/an383
11    - qemu_xtensa/dc233c/mmu
12  integration_platforms:
13    - qemu_cortex_a9          # ARM Cortex-A9 (ARMv7-A ISA)
14    - qemu_cortex_r5          # ARM Cortex-R5 (ARMv7-R ISA)
15    - mps2/an385              # ARM Cortex-M3 (ARMv7-M ISA)
16    - mps2/an521/cpu0         # ARM Cortex-M33 (ARMv8-M ISA)
17  filter: not CONFIG_HARVARD
18  extra_configs:
19    - arch:arm64:CONFIG_LLEXT_HEAP_SIZE=128
20  extra_conf_files:
21    - prj.conf
22  min_ram: 172                # Size on arm: max: 145, min: 79
23  min_flash: 172              # Size on arm: max: 140, min: 105
24
25tests:
26  # While there is in practice no value in compiling subsys/llext/*.c
27  # without actually running it to load some extension, let's keep it in
28  # good shape and ready to be used by additional architectures in the
29  # future.
30  llext.loader_build:
31    build_only: true
32
33  # Run the suite with all combinations of core Kconfig options for the LLEXT
34  # subsystem (storage type, ELF type, MPU/MMU etc). To focus on LLEXT issues,
35  # most tests include no_mem_protection.conf, which disables memory protection
36  # hardware completely.
37  llext.readonly:
38    arch_allow:               # Xtensa needs writable storage
39      - arm
40      - riscv
41      - arc
42    filter: not CONFIG_MPU and not CONFIG_MMU
43    extra_conf_files: ['no_mem_protection.conf']
44    extra_configs:
45      - CONFIG_LLEXT_STORAGE_WRITABLE=n
46  llext.readonly_mpu:
47    arch_allow: arm # Xtensa needs writable storage, currently not supported on RISC-V
48    filter: CONFIG_ARCH_HAS_USERSPACE
49    extra_configs:
50      - CONFIG_USERSPACE=y
51      - CONFIG_LLEXT_STORAGE_WRITABLE=n
52  llext.readonly_mmu:
53    arch_allow:
54      - arm64
55      - arm
56      - riscv
57    filter: CONFIG_MMU or CONFIG_RISCV_PMP
58    integration_platforms:
59      - qemu_cortex_a53         # ARM Cortex-A53 (ARMv8-A ISA)
60    extra_configs:
61      - CONFIG_LLEXT_HEAP_SIZE=128 # qemu_cortex_a9 requires larger heap
62      - CONFIG_LLEXT_STORAGE_WRITABLE=n
63  llext.writable:
64    arch_allow:
65      - arm
66      - xtensa
67      - riscv
68      - arc
69    integration_platforms:
70      - qemu_xtensa/dc233c      # Xtensa ISA
71    filter: not CONFIG_MPU and not CONFIG_MMU
72    extra_conf_files: ['no_mem_protection.conf']
73    extra_configs:
74      - CONFIG_LLEXT_STORAGE_WRITABLE=y
75  llext.writable_relocatable:
76    arch_allow:
77      - arm
78      - xtensa
79      - riscv
80      - arc
81    platform_exclude:
82      - qemu_arc/qemu_arc_hs5x     # See #80949
83      - nsim/nsim_hs5x             # See #80949
84      - nsim/nsim_hs5x/smp         # See #80949
85      - nsim/nsim_hs5x/smp/12cores # See #80949
86    integration_platforms:
87      - qemu_xtensa/dc233c      # Xtensa ISA
88    filter: not CONFIG_MPU and not CONFIG_MMU
89    extra_conf_files: ['no_mem_protection.conf']
90    extra_configs:
91      - CONFIG_LLEXT_STORAGE_WRITABLE=y
92      - CONFIG_LLEXT_TYPE_ELF_RELOCATABLE=y
93
94  # Test the Symbol Link Identifier (SLID) linking feature on writable
95  # storage to cover both ARM and Xtensa architectures on the same test.
96  llext.writable_slid_linking:
97    arch_allow:
98      - arm
99      - xtensa
100      - riscv
101      - arc
102    integration_platforms:
103      - qemu_xtensa/dc233c      # Xtensa ISA
104    filter: not CONFIG_MPU and not CONFIG_MMU
105    extra_conf_files: ['no_mem_protection.conf']
106    extra_configs:
107      - CONFIG_LLEXT_STORAGE_WRITABLE=y
108      - CONFIG_LLEXT_EXPORT_BUILTINS_BY_SLID=y
109  llext.writable_relocatable_slid_linking:
110    arch_allow:
111      - arm
112      - xtensa
113      - riscv
114      - arc
115    platform_exclude:
116      - qemu_arc/qemu_arc_hs5x     # See #80949
117      - nsim/nsim_hs5x             # See #80949
118      - nsim/nsim_hs5x/smp         # See #80949
119      - nsim/nsim_hs5x/smp/12cores # See #80949
120    integration_platforms:
121      - qemu_xtensa/dc233c      # Xtensa ISA
122    filter: not CONFIG_MPU and not CONFIG_MMU
123    extra_conf_files: ['no_mem_protection.conf']
124    extra_configs:
125      - CONFIG_LLEXT_STORAGE_WRITABLE=y
126      - CONFIG_LLEXT_TYPE_ELF_RELOCATABLE=y
127      - CONFIG_LLEXT_EXPORT_BUILTINS_BY_SLID=y
128
129  # Test the export device IDs by hash feature on a single architecture in
130  # both normal and SLID mode.
131  llext.devices_by_hash:
132    arch_allow: arm
133    filter: not CONFIG_MPU and not CONFIG_MMU
134    extra_conf_files: ['no_mem_protection.conf']
135    extra_configs:
136      - CONFIG_LLEXT_STORAGE_WRITABLE=n
137      - CONFIG_LLEXT_EXPORT_DEV_IDS_BY_HASH=y
138  llext.devices_by_hash_slid_linking:
139    arch_allow: arm
140    filter: not CONFIG_MPU and not CONFIG_MMU
141    extra_conf_files: ['no_mem_protection.conf']
142    extra_configs:
143      - CONFIG_LLEXT_STORAGE_WRITABLE=n
144      - CONFIG_LLEXT_EXPORT_DEV_IDS_BY_HASH=y
145      - CONFIG_LLEXT_EXPORT_BUILTINS_BY_SLID=y
146