1 /*
2 * Copyright (c) 2021 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #define DT_DRV_COMPAT nxp_os_timer
8
9 #include <limits.h>
10
11 #include <zephyr/init.h>
12 #include <zephyr/drivers/timer/system_timer.h>
13 #include <zephyr/irq.h>
14 #include <zephyr/sys_clock.h>
15 #include <zephyr/spinlock.h>
16 #include <zephyr/drivers/counter.h>
17 #include <zephyr/pm/pm.h>
18 #include "fsl_ostimer.h"
19 #ifndef CONFIG_SOC_MCXN236
20 #include "fsl_power.h"
21 #endif
22
23 #define CYC_PER_TICK ((uint32_t)((uint64_t)sys_clock_hw_cycles_per_sec() \
24 / (uint64_t)CONFIG_SYS_CLOCK_TICKS_PER_SEC))
25 #define CYC_PER_US ((uint32_t)((uint64_t)sys_clock_hw_cycles_per_sec() \
26 / (uint64_t)USEC_PER_SEC))
27 #define MAX_CYC INT_MAX
28 #define MAX_TICKS ((MAX_CYC - CYC_PER_TICK) / CYC_PER_TICK)
29 #define MIN_DELAY 1000
30
31 #define TICKLESS IS_ENABLED(CONFIG_TICKLESS_KERNEL)
32
33 static struct k_spinlock lock;
34 static uint64_t last_count;
35 static OSTIMER_Type *base;
36 /* Total cycles of the timer compensated to include the time lost in "sleep/deep sleep" modes.
37 * This maintains the timer count to account for the case if the OS Timer is reset in
38 * certain deep sleep modes and the time elapsed when it is powered off.
39 */
40 static uint64_t cyc_sys_compensated;
41 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(standby)) && CONFIG_PM
42 /* This is the counter device used when OS timer is not available in
43 * standby mode.
44 */
45 static const struct device *counter_dev;
46 /* Indicates if the counter is running. */
47 bool counter_running;
48 #endif
49
mcux_lpc_ostick_get_compensated_timer_value(void)50 static uint64_t mcux_lpc_ostick_get_compensated_timer_value(void)
51 {
52 return (OSTIMER_GetCurrentTimerValue(base) + cyc_sys_compensated);
53 }
54
mcux_lpc_ostick_isr(const void * arg)55 void mcux_lpc_ostick_isr(const void *arg)
56 {
57 ARG_UNUSED(arg);
58
59 k_spinlock_key_t key = k_spin_lock(&lock);
60 uint64_t now = mcux_lpc_ostick_get_compensated_timer_value();
61 uint32_t dticks = (uint32_t)((now - last_count) / CYC_PER_TICK);
62
63 /* Clear interrupt flag by writing 1. */
64 base->OSEVENT_CTRL &= ~OSTIMER_OSEVENT_CTRL_OSTIMER_INTENA_MASK;
65
66 last_count += dticks * CYC_PER_TICK;
67
68 if (!TICKLESS) {
69 uint64_t next = last_count + CYC_PER_TICK;
70
71 if ((int64_t)(next - now) < MIN_DELAY) {
72 next += CYC_PER_TICK;
73 }
74 OSTIMER_SetMatchValue(base, next, NULL);
75 }
76
77 k_spin_unlock(&lock, key);
78 sys_clock_announce(IS_ENABLED(CONFIG_TICKLESS_KERNEL) ? dticks : 1);
79 }
80
81 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(standby)) && CONFIG_PM
82
83 /* The OS Timer is disabled in certain low power modes and cannot wakeup the system
84 * on timeout. This function will be called by the low power code to allow the
85 * OS Timer to save off the count if needed and also start a wakeup counter
86 * that would wakeup the system from deep power down modes.
87 */
mcux_lpc_ostick_set_counter_timeout(int32_t curr_timeout)88 static uint32_t mcux_lpc_ostick_set_counter_timeout(int32_t curr_timeout)
89 {
90 uint32_t ret = 0;
91
92 if (counter_dev) {
93 uint32_t timeout;
94 int32_t ticks;
95 struct counter_top_cfg top_cfg = { 0 };
96 timeout = k_ticks_to_us_near32(curr_timeout);
97
98 ticks = counter_us_to_ticks(counter_dev, timeout);
99 ticks = CLAMP(ticks, 1, counter_get_max_top_value(counter_dev));
100
101 top_cfg.ticks = ticks;
102 top_cfg.callback = NULL;
103 top_cfg.user_data = NULL;
104 top_cfg.flags = 0;
105 if (counter_set_top_value(counter_dev, &top_cfg) != 0) {
106 /* Setting top value failed, try setting an alarm */
107 struct counter_alarm_cfg alarm_cfg;
108
109 alarm_cfg.ticks = ticks;
110 alarm_cfg.callback = NULL;
111 alarm_cfg.user_data = NULL;
112 alarm_cfg.flags = 0;
113
114 if (counter_set_channel_alarm(counter_dev, 0, &alarm_cfg) != 0) {
115 ret = 1;
116 goto done;
117 }
118 }
119
120 /* Counter is set to wakeup the system after the requested time */
121 if (counter_start(counter_dev) != 0) {
122 ret = 1;
123 goto done;
124 }
125 counter_running = true;
126 #if CONFIG_MCUX_OS_TIMER_PM_POWERED_OFF
127 /* Capture the current timer value for cases where it loses its state
128 * in low power modes.
129 */
130 cyc_sys_compensated += OSTIMER_GetCurrentTimerValue(base);
131 #endif
132 } else {
133 ret = 1;
134 }
135
136 done:
137 return ret;
138 }
139
140 /* After exit from certain low power modes where the OS Timer was disabled, the
141 * current tick value should be updated to account for the period when the OS Timer
142 * was disabled. Also in certain cases, the OS Timer might lose its state and needs
143 * to be reinitialized.
144 */
mcux_lpc_ostick_compensate_system_timer(void)145 static uint32_t mcux_lpc_ostick_compensate_system_timer(void)
146 {
147 uint32_t slept_time_ticks;
148 uint32_t slept_time_us;
149
150 if (!counter_dev) {
151 return 1;
152 }
153
154 if (!counter_running) {
155 return 0;
156 }
157
158 counter_stop(counter_dev);
159 counter_running = false;
160 counter_get_value(counter_dev, &slept_time_ticks);
161
162 if (!(counter_is_counting_up(counter_dev))) {
163 slept_time_ticks = counter_get_top_value(counter_dev) -
164 slept_time_ticks;
165 }
166 slept_time_us = counter_ticks_to_us(counter_dev, slept_time_ticks);
167 cyc_sys_compensated += CYC_PER_US * slept_time_us;
168 #if CONFIG_MCUX_OS_TIMER_PM_POWERED_OFF
169 /* Reset the OS Timer to a known state */
170 RESET_PeripheralReset(kOSEVENT_TIMER_RST_SHIFT_RSTn);
171 /* Reactivate os_timer for cases where it loses its state */
172 OSTIMER_Init(base);
173 #endif
174 /* Announce the time slept to the kernel*/
175 mcux_lpc_ostick_isr(NULL);
176
177 return 0;
178 }
179
180 #endif
181
sys_clock_set_timeout(int32_t ticks,bool idle)182 void sys_clock_set_timeout(int32_t ticks, bool idle)
183 {
184 ARG_UNUSED(idle);
185
186 if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL)) {
187 /* Only for tickless kernel system */
188 return;
189 }
190
191 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(standby)) && CONFIG_PM
192 if (idle) {
193 /* OS Timer may not be able to wakeup in certain low power modes.
194 * For these cases, we start a counter that can wakeup
195 * from low power modes.
196 */
197 if (pm_state_next_get(0)->state == PM_STATE_STANDBY) {
198 if (mcux_lpc_ostick_set_counter_timeout(ticks) == 0) {
199 /* A low power counter has been started. No need to
200 * go further, simply return
201 */
202 return;
203 }
204 }
205 }
206 #endif
207
208 ticks = ticks == K_TICKS_FOREVER ? MAX_TICKS : ticks;
209 ticks = CLAMP(ticks - 1, 0, (int32_t)MAX_TICKS);
210
211 k_spinlock_key_t key = k_spin_lock(&lock);
212 uint64_t now = mcux_lpc_ostick_get_compensated_timer_value();
213 uint32_t adj, cyc = ticks * CYC_PER_TICK;
214
215 /* Round up to next tick boundary. */
216 adj = (uint32_t)(now - last_count) + (CYC_PER_TICK - 1);
217 if (cyc <= MAX_CYC - adj) {
218 cyc += adj;
219 } else {
220 cyc = MAX_CYC;
221 }
222 cyc = (cyc / CYC_PER_TICK) * CYC_PER_TICK;
223
224 if ((int32_t)(cyc + last_count - now) < MIN_DELAY) {
225 cyc += CYC_PER_TICK;
226 }
227
228 OSTIMER_SetMatchValue(base, cyc + last_count - cyc_sys_compensated, NULL);
229
230 k_spin_unlock(&lock, key);
231 }
232
sys_clock_elapsed(void)233 uint32_t sys_clock_elapsed(void)
234 {
235 if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL)) {
236 /* Always return 0 for tickful kernel system */
237 return 0;
238 }
239
240 k_spinlock_key_t key = k_spin_lock(&lock);
241 uint32_t ret = ((uint32_t)mcux_lpc_ostick_get_compensated_timer_value() -
242 (uint32_t)last_count) / CYC_PER_TICK;
243
244 k_spin_unlock(&lock, key);
245 return ret;
246 }
247
sys_clock_cycle_get_32(void)248 uint32_t sys_clock_cycle_get_32(void)
249 {
250 return (uint32_t)mcux_lpc_ostick_get_compensated_timer_value();
251 }
252
sys_clock_cycle_get_64(void)253 uint64_t sys_clock_cycle_get_64(void)
254 {
255 return mcux_lpc_ostick_get_compensated_timer_value();
256 }
257
sys_clock_idle_exit(void)258 void sys_clock_idle_exit(void)
259 {
260 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(standby)) && CONFIG_PM
261 /* The tick should be compensated for states where the
262 * OS Timer is disabled
263 */
264 if (pm_state_next_get(0)->state == PM_STATE_STANDBY) {
265 mcux_lpc_ostick_compensate_system_timer();
266 }
267 #endif
268 }
269
sys_clock_driver_init(void)270 static int sys_clock_driver_init(void)
271 {
272
273 /* Configure event timer's ISR */
274 IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priority),
275 mcux_lpc_ostick_isr, NULL, 0);
276
277 base = (OSTIMER_Type *)DT_INST_REG_ADDR(0);
278
279 #if (DT_INST_PROP(0, wakeup_source))
280 EnableDeepSleepIRQ(DT_INST_IRQN(0));
281 #endif
282
283 /* Initialize the OS timer, setting clock configuration. */
284 OSTIMER_Init(base);
285
286 last_count = mcux_lpc_ostick_get_compensated_timer_value();
287 OSTIMER_SetMatchValue(base, last_count + CYC_PER_TICK, NULL);
288
289 /* Enable event timer interrupt */
290 irq_enable(DT_INST_IRQN(0));
291
292 /* On some SoC's, OS Timer cannot wakeup from low power mode in standby modes */
293 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(standby)) && CONFIG_PM
294 counter_dev = DEVICE_DT_GET_OR_NULL(DT_INST_PHANDLE(0, deep_sleep_counter));
295 #endif
296
297 return 0;
298 }
299
300 SYS_INIT(sys_clock_driver_init, PRE_KERNEL_2,
301 CONFIG_SYSTEM_CLOCK_INIT_PRIORITY);
302
