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Searched refs:regval (Results 1 – 25 of 25) sorted by relevance

/Zephyr-latest/drivers/gpio/
Dgpio_bcm2711.c74 uint32_t regval; in gpio_bcm2711_pin_configure() local
85 regval = sys_read32(GPFSEL(data->base, group)); in gpio_bcm2711_pin_configure()
86 regval &= ~(BIT_MASK(FSEL_BITS) << shift); in gpio_bcm2711_pin_configure()
88 regval |= (FSEL_OUTPUT << shift); in gpio_bcm2711_pin_configure()
90 sys_write32(regval, GPFSEL(data->base, group)); in gpio_bcm2711_pin_configure()
99 regval = sys_read32(GPSET(data->base, group)); in gpio_bcm2711_pin_configure()
100 regval |= BIT(shift); in gpio_bcm2711_pin_configure()
101 sys_write32(regval, GPSET(data->base, group)); in gpio_bcm2711_pin_configure()
103 regval = sys_read32(GPCLR(data->base, group)); in gpio_bcm2711_pin_configure()
104 regval |= BIT(shift); in gpio_bcm2711_pin_configure()
[all …]
/Zephyr-latest/drivers/watchdog/
Dwdt_nxp_fs26.c243 static int fs26_setreg(const struct spi_dt_spec *spi, uint8_t addr, uint16_t regval) in fs26_setreg() argument
248 .data = regval in fs26_setreg()
341 uint32_t regval = 0; in fs26_poll_for_init_fs_state() local
349 regval = rx_frame.data; in fs26_poll_for_init_fs_state()
353 } while ((now < timeout) && (regval & FS_STATES_MASK) != FS_STATES_INIT_FS); in fs26_poll_for_init_fs_state()
425 uint32_t regval; in wdt_nxp_fs26_setup() local
445 regval = WD_ERR_LIMIT(CONFIG_WDT_NXP_FS26_ERROR_COUNTER_LIMIT) in wdt_nxp_fs26_setup()
449 fs26_setreg(&config->spi, FS26_FS_I_WD_CFG, regval); in wdt_nxp_fs26_setup()
450 fs26_setreg(&config->spi, FS26_FS_I_NOT_WD_CFG, ~regval); in wdt_nxp_fs26_setup()
453 regval = ((data->window_period << WDW_PERIOD_SHIFT) & WDW_PERIOD_MASK) in wdt_nxp_fs26_setup()
[all …]
/Zephyr-latest/drivers/dac/
Ddac_dacx0508.c123 uint8_t regval[2] = {0, }; in dacx0508_reg_update() local
127 ret = dacx0508_reg_read(dev, addr, regval); in dacx0508_reg_update()
131 tmp = (regval[0] << 8) | regval[1]; in dacx0508_reg_update()
139 regval[0] = tmp >> 8; in dacx0508_reg_update()
140 regval[1] = tmp & 0xFF; in dacx0508_reg_update()
142 ret = dacx0508_reg_write(dev, addr, regval); in dacx0508_reg_update()
181 uint8_t regval[2]; in dacx0508_write_value() local
200 regval[0] = value >> 8; in dacx0508_write_value()
201 regval[1] = value & 0xFF; in dacx0508_write_value()
203 ret = dacx0508_reg_write(dev, DACX0508_REG_DAC0 + channel, regval); in dacx0508_write_value()
[all …]
Ddac_dacx3608.c65 uint16_t regval; in dacx3608_reg_update() local
68 ret = dacx3608_reg_read(dev, reg, &regval); in dacx3608_reg_update()
74 regval |= mask; in dacx3608_reg_update()
76 regval &= ~mask; in dacx3608_reg_update()
79 ret = dacx3608_reg_write(dev, reg, regval); in dacx3608_reg_update()
135 uint16_t regval; in dacx3608_write_value() local
168 regval = value << 2; in dacx3608_write_value()
169 regval &= 0xFFFF; in dacx3608_write_value()
173 ret = dacx3608_reg_write(dev, reg, regval); in dacx3608_write_value()
184 uint16_t regval = DACX3608_SW_RST; in dacx3608_soft_reset() local
[all …]
Ddac_ltc166x.c30 uint16_t regval; in ltc166x_reg_write() local
32 regval = FIELD_PREP(LTC166X_REG_MASK, addr); in ltc166x_reg_write()
35 regval |= FIELD_PREP(LTC166X_DATA10_MASK, data); in ltc166x_reg_write()
37 regval |= FIELD_PREP(LTC166X_DATA8_MASK, data); in ltc166x_reg_write()
41 .buf = &regval, in ltc166x_reg_write()
42 .len = sizeof(regval), in ltc166x_reg_write()
/Zephyr-latest/drivers/interrupt_controller/
Dintc_vim.c66 uint32_t irq_group_num, irq_bit_num, regval; in z_vim_irq_priority_set() local
80 regval = sys_read32(VIM_INTTYPE(irq_group_num)); in z_vim_irq_priority_set()
83 regval |= (BIT(irq_bit_num)); in z_vim_irq_priority_set()
85 regval &= ~(BIT(irq_bit_num)); in z_vim_irq_priority_set()
88 sys_write32(regval, VIM_INTTYPE(irq_group_num)); in z_vim_irq_priority_set()
123 uint32_t irq_group_num, irq_bit_num, regval; in z_vim_irq_is_enabled() local
133 regval = sys_read32(VIM_INTR_EN_SET(irq_group_num)); in z_vim_irq_is_enabled()
135 return !!(regval & (BIT(irq_bit_num))); in z_vim_irq_is_enabled()
/Zephyr-latest/drivers/mdio/
Dmdio_nxp_s32_gmac.c39 uint16_t regad, uint16_t *regval) in mdio_nxp_s32_read_c45() argument
50 status = Gmac_Ip_MDIOReadMMD(cfg->instance, prtad, devad, regad, regval, in mdio_nxp_s32_read_c45()
59 uint16_t regad, uint16_t regval) in mdio_nxp_s32_write_c45() argument
70 status = Gmac_Ip_MDIOWriteMMD(cfg->instance, prtad, devad, regad, regval, in mdio_nxp_s32_write_c45()
79 uint8_t regad, uint16_t *regval) in mdio_nxp_s32_read_c22() argument
90 status = Gmac_Ip_MDIORead(cfg->instance, prtad, regad, regval, in mdio_nxp_s32_read_c22()
99 uint8_t regad, uint16_t regval) in mdio_nxp_s32_write_c22() argument
110 status = Gmac_Ip_MDIOWrite(cfg->instance, prtad, regad, regval, in mdio_nxp_s32_write_c22()
Dmdio_nxp_s32_netc.c27 uint8_t regad, uint16_t *regval) in nxp_s32_mdio_read() argument
34 status = Netc_EthSwt_Ip_ReadTrcvRegister(cfg->instance, prtad, regad, regval); in nxp_s32_mdio_read()
41 uint8_t regad, uint16_t regval) in nxp_s32_mdio_write() argument
48 status = Netc_EthSwt_Ip_WriteTrcvRegister(cfg->instance, prtad, regad, regval); in nxp_s32_mdio_write()
Dmdio_nxp_imx_netc.c30 uint16_t *regval) in nxp_imx_netc_mdio_read() argument
36 result = NETC_MDIORead(&data->handle, prtad, regad, regval); in nxp_imx_netc_mdio_read()
43 uint16_t regval) in nxp_imx_netc_mdio_write() argument
49 result = NETC_MDIOWrite(&data->handle, prtad, regad, regval); in nxp_imx_netc_mdio_write()
/Zephyr-latest/drivers/usb/device/
Dusb_dc_sam_usbhs.c315 uint32_t regval; in usb_dc_attach() local
327 regval = USBHS_DEVCTRL_DETACH; in usb_dc_attach()
330 regval |= USBHS_DEVCTRL_SPDCONF_NORMAL; in usb_dc_attach()
333 regval |= USBHS_DEVCTRL_SPDCONF_LOW_POWER; in usb_dc_attach()
335 USBHS->USBHS_DEVCTRL = regval; in usb_dc_attach()
465 uint32_t regval = 0U; in usb_dc_ep_configure() local
493 regval |= USBHS_DEVEPTCFG_EPTYPE_CTRL; in usb_dc_ep_configure()
496 regval |= USBHS_DEVEPTCFG_EPTYPE_ISO; in usb_dc_ep_configure()
499 regval |= USBHS_DEVEPTCFG_EPTYPE_BLK; in usb_dc_ep_configure()
502 regval |= USBHS_DEVEPTCFG_EPTYPE_INTRPT; in usb_dc_ep_configure()
[all …]
Dusb_dc_sam_usbc.c664 uint32_t regval; in usb_dc_attach() local
708 regval = USBC_UDCON_DETACH; in usb_dc_attach()
712 WRITE_BIT(regval, USBC_UDCON_LS_Pos, 0); in usb_dc_attach()
715 WRITE_BIT(regval, USBC_UDCON_LS_Pos, 1); in usb_dc_attach()
718 WRITE_BIT(regval, USBC_UDCON_LS_Pos, 0); in usb_dc_attach()
724 regs->UDCON = regval; in usb_dc_attach()
876 uint32_t regval = 0U; in usb_dc_ep_configure() local
898 regval |= USBC_UECFG0_EPTYPE_CONTROL; in usb_dc_ep_configure()
901 regval |= USBC_UECFG0_EPTYPE_ISOCHRONOUS; in usb_dc_ep_configure()
904 regval |= USBC_UECFG0_EPTYPE_BULK; in usb_dc_ep_configure()
[all …]
/Zephyr-latest/drivers/sensor/bosch/bmc150_magn/
Dbmc150_magn.h57 #define BMC150_MAGN_REGVAL_TO_REPXY(regval) (((regval) * 2) + 1) argument
58 #define BMC150_MAGN_REGVAL_TO_REPZ(regval) ((regval) + 1) argument
/Zephyr-latest/include/zephyr/arch/arc/v2/
Darc_connect.h168 struct arc_connect_cmd regval; in z_arc_connect_cmd() local
170 regval.pad = 0; in z_arc_connect_cmd()
171 regval.cmd = cmd; in z_arc_connect_cmd()
172 regval.param = param; in z_arc_connect_cmd()
174 z_arc_v2_aux_reg_write(_ARC_V2_CONNECT_CMD, regval.val); in z_arc_connect_cmd()
/Zephyr-latest/drivers/sensor/bosch/bmm150/
Dbmm150.h111 #define BMM150_REGVAL_TO_REPXY(regval) (((regval) * 2) + 1) argument
112 #define BMM150_REGVAL_TO_REPZ(regval) ((regval) + 1) argument
/Zephyr-latest/drivers/i2c/
Di2c_cc32xx.c332 uint32_t regval; in i2c_cc32xx_init() local
359 regval = HWREG(COMMON_REG_BASE); in i2c_cc32xx_init()
360 regval = (regval & ~I2C_SEM_MASK) | (0x01 << I2C_SEM_TAKE); in i2c_cc32xx_init()
361 HWREG(COMMON_REG_BASE) = regval; in i2c_cc32xx_init()
/Zephyr-latest/drivers/ieee802154/
Dieee802154_rf2xx_iface.c59 uint8_t regval = 0; in rf2xx_iface_reg_read() local
77 .buf = &regval, in rf2xx_iface_reg_read()
92 (addr & ~(RF2XX_RF_CMD_REG_R)), status, regval); in rf2xx_iface_reg_read()
94 return regval; in rf2xx_iface_reg_read()
/Zephyr-latest/drivers/ethernet/
Dphy_cyclonev.c354 uint16_t regval = 0; in alt_eth_phy_get_duplex_and_speed() local
357 rc = alt_eth_phy_read_register(instance, PHY_CR, &regval, p); in alt_eth_phy_get_duplex_and_speed()
359 if (regval & PHY_DUPLEX_STATUS) { in alt_eth_phy_get_duplex_and_speed()
365 if (regval & PHY_SPEED_100) { in alt_eth_phy_get_duplex_and_speed()
368 if (regval & PHY_SPEED_1000) { in alt_eth_phy_get_duplex_and_speed()
Deth_nxp_s32_gmac.c147 uint32_t regval; in select_phy_interface() local
151 regval = DCM_GPR_DCMRWF1_EMAC_CONF_SEL(0U); in select_phy_interface()
154 regval = DCM_GPR_DCMRWF1_EMAC_CONF_SEL(2U); in select_phy_interface()
158 regval = DCM_GPR_DCMRWF1_EMAC_CONF_SEL(1U); in select_phy_interface()
165 IP_DCM_GPR->DCMRWF1 = (IP_DCM_GPR->DCMRWF1 & ~DCM_GPR_DCMRWF1_EMAC_CONF_SEL_MASK) | regval; in select_phy_interface()
511 uint32_t regval; in eth_nxp_s32_set_config() local
514 ARG_UNUSED(regval); in eth_nxp_s32_set_config()
529 regval = cfg->base->MAC_PACKET_FILTER; in eth_nxp_s32_set_config()
530 if (config->promisc_mode && !(regval & GMAC_MAC_PACKET_FILTER_PR_MASK)) { in eth_nxp_s32_set_config()
532 } else if (!config->promisc_mode && (regval & GMAC_MAC_PACKET_FILTER_PR_MASK)) { in eth_nxp_s32_set_config()
Deth_lan9250.c527 uint32_t regval; in lan9250_tx() local
532 lan9250_read_sys_reg(dev, LAN9250_TX_FIFO_INF, &regval); in lan9250_tx()
533 status_size = (regval & LAN9250_TX_FIFO_INF_TXSUSED) >> 16; in lan9250_tx()
534 free_size = regval & LAN9250_TX_FIFO_INF_TXFREE; in lan9250_tx()
Deth_cyclonev.c582 uint32_t regval = sys_read32(GMACGRP_CONTROL_STATUS_ADDR(p->base_addr)); in eth_cyclonev_isr() local
584 if (EMAC_GMAC_MII_CTL_STAT_LNKSTS_GET(regval)) { in eth_cyclonev_isr()
591 if (EMAC_GMAC_MII_CTL_STAT_LNKMOD_GET(regval)) { in eth_cyclonev_isr()
597 switch (EMAC_GMAC_MII_CTL_STAT_LNKSPEED_GET(regval)) { in eth_cyclonev_isr()
/Zephyr-latest/soc/microchip/mec/mec172x/
Ddevice_power.c270 uint32_t regval = sys_read32(addr); in deep_sleep_save_blocks() local
272 ds_ctx.smb_info[n] = regval; in deep_sleep_save_blocks()
273 sys_write32(regval & ~(MCHP_I2C_SMB_CFG_ENAB), addr); in deep_sleep_save_blocks()
/Zephyr-latest/drivers/sensor/st/iis2dlpc/
Diis2dlpc.c264 uint8_t regval = IIS2DLPC_CONT_LOW_PWR_12bit; in iis2dlpc_set_power_mode() local
271 regval = pm; in iis2dlpc_set_power_mode()
278 return iis2dlpc_write_reg(ctx, IIS2DLPC_CTRL1, &regval, 1); in iis2dlpc_set_power_mode()
/Zephyr-latest/drivers/lora/
Dsx127x.c583 uint8_t regval; in sx127x_lora_init() local
605 ret = sx127x_read(REG_VERSION, &regval, 1); in sx127x_lora_init()
611 LOG_INF("SX127x version 0x%02x found", regval); in sx127x_lora_init()
/Zephyr-latest/drivers/sensor/st/lis2dw12/
Dlis2dw12.c445 uint8_t regval = LIS2DW12_CONT_LOW_PWR_12bit; in lis2dw12_set_power_mode() local
452 regval = pm; in lis2dw12_set_power_mode()
459 return lis2dw12_write_reg(ctx, LIS2DW12_CTRL1, &regval, 1); in lis2dw12_set_power_mode()
/Zephyr-latest/arch/xtensa/core/
Dgdbstub.c90 #define set_one_sreg(regnum_p, regval) { \ argument
94 [val] "r" (regval), \