74 	uint32_t regval;  in gpio_bcm2711_pin_configure()  local
85 		regval = sys_read32(GPFSEL(data->base, group));  in gpio_bcm2711_pin_configure()
86 		regval &= ~(BIT_MASK(FSEL_BITS) << shift);  in gpio_bcm2711_pin_configure()
88 			regval |= (FSEL_OUTPUT << shift);  in gpio_bcm2711_pin_configure()
90 		sys_write32(regval, GPFSEL(data->base, group));  in gpio_bcm2711_pin_configure()
99 			regval = sys_read32(GPSET(data->base, group));  in gpio_bcm2711_pin_configure()
100 			regval |= BIT(shift);  in gpio_bcm2711_pin_configure()
101 			sys_write32(regval, GPSET(data->base, group));  in gpio_bcm2711_pin_configure()
103 			regval = sys_read32(GPCLR(data->base, group));  in gpio_bcm2711_pin_configure()
104 			regval |= BIT(shift);  in gpio_bcm2711_pin_configure()
105 			sys_write32(regval, GPCLR(data->base, group));  in gpio_bcm2711_pin_configure()
114 		regval = sys_read32(GPPULL(data->base, group));  in gpio_bcm2711_pin_configure()
115 		regval &= ~(BIT_MASK(PULL_BITS) << shift);  in gpio_bcm2711_pin_configure()
117 			regval |= (PULL_UP << shift);  in gpio_bcm2711_pin_configure()
119 			regval |= (PULL_DOWN << shift);  in gpio_bcm2711_pin_configure()
121 		sys_write32(regval, GPPULL(data->base, group));  in gpio_bcm2711_pin_configure()
131 	uint64_t regval;  in gpio_bcm2711_port_get_raw()  local
133 	regval = ((uint64_t)sys_read32(GPLEV(data->base, 0))) |  in gpio_bcm2711_port_get_raw()
136 	*value = (regval >> cfg->offset) & BIT_MASK(cfg->ngpios);  in gpio_bcm2711_port_get_raw()
146 	uint64_t regval, regmask;  in gpio_bcm2711_port_set_masked_raw()  local
152 	regval = (uint64_t)value << cfg->offset;  in gpio_bcm2711_port_set_masked_raw()
155 	set = regval & regmask;  in gpio_bcm2711_port_set_masked_raw()
156 	clr = regval ^ regmask;  in gpio_bcm2711_port_set_masked_raw()
170 	uint64_t regval;  in gpio_bcm2711_port_set_bits_raw()  local
172 	regval = ((uint64_t)pins & BIT_MASK(cfg->ngpios)) << cfg->offset;  in gpio_bcm2711_port_set_bits_raw()
174 	sys_write32(FROM_U64(regval, 0), GPSET(data->base, 0));  in gpio_bcm2711_port_set_bits_raw()
175 	sys_write32(FROM_U64(regval, 1), GPSET(data->base, 1));  in gpio_bcm2711_port_set_bits_raw()
184 	uint64_t regval;  in gpio_bcm2711_port_clear_bits_raw()  local
186 	regval = ((uint64_t)pins & BIT_MASK(cfg->ngpios)) << cfg->offset;  in gpio_bcm2711_port_clear_bits_raw()
188 	sys_write32(FROM_U64(regval, 0), GPCLR(data->base, 0));  in gpio_bcm2711_port_clear_bits_raw()
189 	sys_write32(FROM_U64(regval, 1), GPCLR(data->base, 1));  in gpio_bcm2711_port_clear_bits_raw()
198 	uint64_t regval, regmask;  in gpio_bcm2711_port_toggle_bits()  local
201 	regval = ((uint64_t)sys_read32(GPLEV(data->base, 0))) |  in gpio_bcm2711_port_toggle_bits()
206 	set = regval ^ regmask;  in gpio_bcm2711_port_toggle_bits()
207 	clr = regval & regmask;  in gpio_bcm2711_port_toggle_bits()
223 	uint32_t regval;  in gpio_bcm2711_pin_interrupt_configure()  local
230 	regval = sys_read32(GPREN(data->base, group));  in gpio_bcm2711_pin_interrupt_configure()
231 	regval &= ~BIT(shift);  in gpio_bcm2711_pin_interrupt_configure()
232 	sys_write32(regval, GPREN(data->base, group));  in gpio_bcm2711_pin_interrupt_configure()
234 	regval = sys_read32(GPFEN(data->base, group));  in gpio_bcm2711_pin_interrupt_configure()
235 	regval &= ~BIT(shift);  in gpio_bcm2711_pin_interrupt_configure()
236 	sys_write32(regval, GPFEN(data->base, group));  in gpio_bcm2711_pin_interrupt_configure()
238 	regval = sys_read32(GPHEN(data->base, group));  in gpio_bcm2711_pin_interrupt_configure()
239 	regval &= ~BIT(shift);  in gpio_bcm2711_pin_interrupt_configure()
240 	sys_write32(regval, GPHEN(data->base, group));  in gpio_bcm2711_pin_interrupt_configure()
242 	regval = sys_read32(GPLEN(data->base, group));  in gpio_bcm2711_pin_interrupt_configure()
243 	regval &= ~BIT(shift);  in gpio_bcm2711_pin_interrupt_configure()
244 	sys_write32(regval, GPLEN(data->base, group));  in gpio_bcm2711_pin_interrupt_configure()
246 	regval = sys_read32(GPAREN(data->base, group));  in gpio_bcm2711_pin_interrupt_configure()
247 	regval &= ~BIT(shift);  in gpio_bcm2711_pin_interrupt_configure()
248 	sys_write32(regval, GPAREN(data->base, group));  in gpio_bcm2711_pin_interrupt_configure()
250 	regval = sys_read32(GPAFEN(data->base, group));  in gpio_bcm2711_pin_interrupt_configure()
251 	regval &= ~BIT(shift);  in gpio_bcm2711_pin_interrupt_configure()
252 	sys_write32(regval, GPAFEN(data->base, group));  in gpio_bcm2711_pin_interrupt_configure()
256 			regval = sys_read32(GPLEN(data->base, group));  in gpio_bcm2711_pin_interrupt_configure()
257 			regval |= BIT(shift);  in gpio_bcm2711_pin_interrupt_configure()
258 			sys_write32(regval, GPLEN(data->base, group));  in gpio_bcm2711_pin_interrupt_configure()
261 			regval = sys_read32(GPHEN(data->base, group));  in gpio_bcm2711_pin_interrupt_configure()
262 			regval |= BIT(shift);  in gpio_bcm2711_pin_interrupt_configure()
263 			sys_write32(regval, GPHEN(data->base, group));  in gpio_bcm2711_pin_interrupt_configure()
267 			regval = sys_read32(GPAFEN(data->base, group));  in gpio_bcm2711_pin_interrupt_configure()
268 			regval |= BIT(shift);  in gpio_bcm2711_pin_interrupt_configure()
269 			sys_write32(regval, GPAFEN(data->base, group));  in gpio_bcm2711_pin_interrupt_configure()
272 			regval = sys_read32(GPAREN(data->base, group));  in gpio_bcm2711_pin_interrupt_configure()
273 			regval |= BIT(shift);  in gpio_bcm2711_pin_interrupt_configure()
274 			sys_write32(regval, GPAREN(data->base, group));  in gpio_bcm2711_pin_interrupt_configure()
293 	uint64_t regval;  in gpio_bcm2711_isr()  local
296 	regval = ((uint64_t)sys_read32(GPEDS(data->base, 0))) |  in gpio_bcm2711_isr()
299 	regval &= BIT_MASK(cfg->ngpios) << cfg->offset;  in gpio_bcm2711_isr()
301 	pins = (uint32_t)(regval >> cfg->offset);  in gpio_bcm2711_isr()
305 	sys_write32(FROM_U64(regval, 0), GPEDS(data->base, 0));  in gpio_bcm2711_isr()
306 	sys_write32(FROM_U64(regval, 1), GPEDS(data->base, 1));  in gpio_bcm2711_isr()