1/*
2 * Copyright (c) 2024 EPAM Systems
3 * Copyright (c) 2024 Renesas Electronics Corporation
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <arm/armv8-m.dtsi>
8#include <mem.h>
9
10/ {
11	compatible = "renesas,r9a08g045";
12	#address-cells = <1>;
13	#size-cells = <1>;
14
15	cpus {
16		#address-cells = <1>;
17		#size-cells = <0>;
18
19		cpu0: cpu@0 {
20			device_type = "cpu";
21			compatible = "arm,cortex-m33";
22			reg = <0>;
23			clock-frequency = <250000000>;
24			#address-cells = <1>;
25			#size-cells = <1>;
26
27			mpu: mpu@e000ed90 {
28				compatible = "arm,armv8m-mpu";
29				reg = <0xe000ed90 0x40>;
30			};
31		};
32	};
33
34	soc {
35		pinctrl: pin-controller@41030000 {
36			compatible = "renesas,rzg-pinctrl";
37			reg = <0x41030000 DT_SIZE_K(64)>;
38			reg-names = "pinctrl";
39
40			gpio: gpio-common {
41				compatible = "renesas,rz-gpio-int";
42				interrupts =
43					<429 10>, <430 10>, <431 10>, <432 10>,
44					<433 10>, <434 10>, <435 10>, <436 10>,
45					<437 10>, <438 10>, <439 10>, <440 10>,
46					<441 10>, <442 10>, <443 10>, <444 10>,
47					<445 10>, <446 10>, <447 10>, <448 10>,
48					<449 10>, <450 10>, <451 10>, <452 10>,
49					<453 10>, <454 10>, <455 10>, <456 10>,
50					<457 10>, <458 10>, <459 10>, <460 10>;
51				#address-cells = <1>;
52				#size-cells = <0>;
53				status = "disabled";
54
55				gpio0: gpio@0 {
56					compatible = "renesas,rz-gpio";
57					gpio-controller;
58					#gpio-cells = <2>;
59					ngpios = <4>;
60					reg = <0x0>;
61					status = "disabled";
62				};
63
64				gpio1: gpio@1000 {
65					compatible = "renesas,rz-gpio";
66					gpio-controller;
67					#gpio-cells= <2>;
68					ngpios = <5>;
69					reg = <0x1000>;
70					status = "disabled";
71				};
72
73				gpio2: gpio@1100 {
74					compatible = "renesas,rz-gpio";
75					gpio-controller;
76					#gpio-cells= <2>;
77					ngpios = <4>;
78					reg = <0x1100>;
79					status = "disabled";
80				};
81
82				gpio3: gpio@1200 {
83					compatible = "renesas,rz-gpio";
84					gpio-controller;
85					#gpio-cells= <2>;
86					ngpios = <4>;
87					reg = <0x1200>;
88					status = "disabled";
89				};
90
91				gpio4: gpio@1300 {
92					compatible = "renesas,rz-gpio";
93					gpio-controller;
94					#gpio-cells= <2>;
95					ngpios = <6>;
96					reg = <0x1300>;
97					status = "disabled";
98				};
99
100				gpio5: gpio@100 {
101					compatible = "renesas,rz-gpio";
102					gpio-controller;
103					#gpio-cells= <2>;
104					ngpios = <5>;
105					reg = <0x100>;
106					status = "disabled";
107				};
108
109				gpio6: gpio@200 {
110					compatible = "renesas,rz-gpio";
111					gpio-controller;
112					#gpio-cells= <2>;
113					ngpios = <5>;
114					reg = <0x200>;
115					status = "disabled";
116				};
117
118				gpio7: gpio@1400 {
119					compatible = "renesas,rz-gpio";
120					gpio-controller;
121					#gpio-cells= <2>;
122					ngpios = <5>;
123					reg = <0x1400>;
124					status = "disabled";
125				};
126
127				gpio8: gpio@1500 {
128					compatible = "renesas,rz-gpio";
129					gpio-controller;
130					#gpio-cells= <2>;
131					ngpios = <5>;
132					reg = <0x1500>;
133					status = "disabled";
134				};
135
136				gpio9: gpio@1600 {
137					compatible = "renesas,rz-gpio";
138					gpio-controller;
139					#gpio-cells= <2>;
140					ngpios = <4>;
141					reg = <0x1600>;
142					status = "disabled";
143				};
144
145				gpio10: gpio@1700 {
146					compatible = "renesas,rz-gpio";
147					gpio-controller;
148					#gpio-cells= <2>;
149					ngpios = <5>;
150					reg = <0x1700>;
151					status = "disabled";
152				};
153
154				gpio11: gpio@300 {
155					compatible = "renesas,rz-gpio";
156					gpio-controller;
157					#gpio-cells= <2>;
158					ngpios = <4>;
159					reg = <0x300>;
160					status = "disabled";
161				};
162
163				gpio12: gpio@400 {
164					compatible = "renesas,rz-gpio";
165					gpio-controller;
166					#gpio-cells= <2>;
167					ngpios = <2>;
168					reg = <0x400>;
169					status = "disabled";
170				};
171
172				gpio13: gpio@500 {
173					compatible = "renesas,rz-gpio";
174					gpio-controller;
175					#gpio-cells= <2>;
176					ngpios = <5>;
177					reg = <0x500>;
178					status = "disabled";
179				};
180
181				gpio14: gpio@600 {
182					compatible = "renesas,rz-gpio";
183					gpio-controller;
184					#gpio-cells= <2>;
185					ngpios = <3>;
186					reg = <0x600>;
187					status = "disabled";
188				};
189
190				gpio15: gpio@700 {
191					compatible = "renesas,rz-gpio";
192					gpio-controller;
193					#gpio-cells= <2>;
194					ngpios = <4>;
195					reg = <0x700>;
196					status = "disabled";
197				};
198
199				gpio16: gpio@800 {
200					compatible = "renesas,rz-gpio";
201					gpio-controller;
202					#gpio-cells= <2>;
203					ngpios = <2>;
204					reg = <0x800>;
205					status = "disabled";
206				};
207
208				gpio17: gpio@900 {
209					compatible = "renesas,rz-gpio";
210					gpio-controller;
211					#gpio-cells= <2>;
212					ngpios = <4>;
213					reg = <0x900>;
214					status = "disabled";
215				};
216
217				gpio18: gpio@A00 {
218					compatible = "renesas,rz-gpio";
219					gpio-controller;
220					#gpio-cells=<2>;
221					ngpios = <6>;
222					reg = <0xA00>;
223					status = "disabled";
224				};
225			};
226		};
227
228		scif0: serial@4004b800 {
229			compatible = "renesas,rz-scif-uart";
230			channel = <0>;
231			reg = <0x4004b800 0x18>;
232			interrupts = <320 1>, <321 1>, <322 1>, <323 1>, <324 1>;
233			interrupt-names = "eri", "bri", "rxi", "txi", "tei";
234			status = "disabled";
235		};
236		scif1: serial@4004bc00 {
237			compatible = "renesas,rz-scif-uart";
238			channel = <1>;
239			reg = <0x4004bc00 0x18>;
240			interrupts = <325 1>, <326 1>, <327 1>, <328 1>, <329 1>;
241			interrupt-names = "eri", "bri", "rxi", "txi", "tei";
242			status = "disabled";
243		};
244		scif2: serial@4004c000 {
245			compatible = "renesas,rz-scif-uart";
246			channel = <2>;
247			reg = <0x4004c000 0x18>;
248			interrupts = <330 1>, <331 1>, <332 1>, <333 1>, <334 1>;
249			interrupt-names = "eri", "bri", "rxi", "txi", "tei";
250			status = "disabled";
251		};
252		scif3: serial@4004c400 {
253			compatible = "renesas,rz-scif-uart";
254			channel = <3>;
255			reg = <0x4004c400 0x18>;
256			interrupts = <335 1>, <336 1>, <337 1>, <338 1>, <339 1>;
257			interrupt-names = "eri", "bri", "rxi", "txi", "tei";
258			status = "disabled";
259		};
260		scif4: serial@4004c800 {
261			compatible = "renesas,rz-scif-uart";
262			channel = <4>;
263			reg = <0x4004c800 0x18>;
264			interrupts = <340 1>, <341 1>, <342 1>, <343 1>, <344 1>;
265			interrupt-names = "eri", "bri", "rxi", "txi", "tei";
266			status = "disabled";
267		};
268		scif5: serial@4004e000 {
269			compatible = "renesas,rz-scif-uart";
270			channel = <5>;
271			reg = <0x4004e000 0x18>;
272			interrupts = <345 1>, <346 1>, <347 1>, <348 1>, <349 1>;
273			interrupt-names = "eri", "bri", "rxi", "txi", "tei";
274			status = "disabled";
275		};
276	};
277};
278
279&nvic {
280	arm,num-irq-priority-bits = <7>;
281};
282