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Searched refs:regs (Results 1 – 23 of 23) sorted by relevance

/trusted-firmware-a-latest/drivers/nxp/ddr/phy-gen1/
Dphy.c17 static void cal_ddr_sdram_clk_cntl(struct ddr_cfg_regs *regs, in cal_ddr_sdram_clk_cntl() argument
23 regs->clk_cntl = ((ss_en & U(0x1)) << 31U) | in cal_ddr_sdram_clk_cntl()
25 debug("clk_cntl = 0x%x\n", regs->clk_cntl); in cal_ddr_sdram_clk_cntl()
28 static void cal_ddr_cdr(struct ddr_cfg_regs *regs, in cal_ddr_cdr() argument
31 regs->cdr[0] = popts->ddr_cdr1; in cal_ddr_cdr()
32 regs->cdr[1] = popts->ddr_cdr2; in cal_ddr_cdr()
33 debug("cdr[0] = 0x%x\n", regs->cdr[0]); in cal_ddr_cdr()
34 debug("cdr[1] = 0x%x\n", regs->cdr[1]); in cal_ddr_cdr()
37 static void cal_ddr_wrlvl_cntl(struct ddr_cfg_regs *regs, in cal_ddr_wrlvl_cntl() argument
49 regs->wrlvl_cntl[0] = ((wrlvl_en & U(0x1)) << 31U) | in cal_ddr_wrlvl_cntl()
[all …]
/trusted-firmware-a-latest/drivers/nxp/ddr/nxp-ddr/
Dddrc.c189 const struct ddr_cfg_regs *regs, in ddrc_set_regs() argument
196 const int mod_bnds = regs->cs[0].config & CTLR_INTLV_MASK; in ddrc_set_regs()
214 ddr_out32(&ddr->ddr_cdr1, regs->cdr[0]); in ddrc_set_regs()
216 ddr_out32(&ddr->sdram_clk_cntl, regs->clk_cntl); in ddrc_set_regs()
221 (regs->cs[i].bnds & U(0xfffefffe)) >> 1U); in ddrc_set_regs()
223 ddr_out32(&ddr->bnds[i].a, regs->cs[i].bnds); in ddrc_set_regs()
225 ddr_out32(&ddr->csn_cfg_2[i], regs->cs[i].config_2); in ddrc_set_regs()
228 ddr_out32(&ddr->timing_cfg_0, regs->timing_cfg[0]); in ddrc_set_regs()
229 ddr_out32(&ddr->timing_cfg_1, regs->timing_cfg[1]); in ddrc_set_regs()
230 ddr_out32(&ddr->timing_cfg_2, regs->timing_cfg[2]); in ddrc_set_regs()
[all …]
Dregs.c31 struct ddr_cfg_regs *regs, in cal_csn_config() argument
59 regs->cs[i].config = ((cs_n_en & 0x1) << 31) | in cal_csn_config()
70 debug(" _config = 0x%x\n", regs->cs[i].config); in cal_csn_config()
90 struct ddr_cfg_regs *regs, in cal_timing_cfg() argument
228 regs->timing_cfg[0] = (((trwt_mclk & 0x3) << 30) | in cal_timing_cfg()
236 debug("timing_cfg[0] = 0x%x\n", regs->timing_cfg[0]); in cal_timing_cfg()
253 regs->timing_cfg[1] = (((pretoact_mclk & 0x0F) << 28) | in cal_timing_cfg()
261 debug("timing_cfg[1] = 0x%x\n", regs->timing_cfg[1]); in cal_timing_cfg()
270 regs->timing_cfg[2] = (((additive_latency & 0xf) << 28) | in cal_timing_cfg()
278 debug("timing_cfg[2] = 0x%x\n", regs->timing_cfg[2]); in cal_timing_cfg()
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Dddr.mk76 $(PLAT_DRIVERS_PATH)/ddr/nxp-ddr/regs.c \
/trusted-firmware-a-latest/drivers/nxp/crypto/caam/src/
Dsec_hw_specific.c32 static inline void hw_set_input_ring_start_addr(struct jobring_regs *regs, in hw_set_input_ring_start_addr() argument
36 sec_out32(&regs->irba_h, PHYS_ADDR_HI(start_addr)); in hw_set_input_ring_start_addr()
38 sec_out32(&regs->irba_h, 0); in hw_set_input_ring_start_addr()
40 sec_out32(&regs->irba_l, PHYS_ADDR_LO(start_addr)); in hw_set_input_ring_start_addr()
43 static inline void hw_set_output_ring_start_addr(struct jobring_regs *regs, in hw_set_output_ring_start_addr() argument
47 sec_out32(&regs->orba_h, PHYS_ADDR_HI(start_addr)); in hw_set_output_ring_start_addr()
49 sec_out32(&regs->orba_h, 0); in hw_set_output_ring_start_addr()
51 sec_out32(&regs->orba_l, PHYS_ADDR_LO(start_addr)); in hw_set_output_ring_start_addr()
60 struct jobring_regs *regs = in hw_remove_entries() local
63 sec_out32(&regs->orjr, num); in hw_remove_entries()
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/trusted-firmware-a-latest/plat/marvell/armada/a8k/common/mss/
Dmss_bl31_setup.c22 uintptr_t regs = MVEBU_CP_REGS_BASE(cp) + MSS_CP_REGS_OFFSET; in mss_start_cp_cm3() local
35 mmio_write_32(MSS_M3_RSTCR(regs), in mss_start_cp_cm3()
/trusted-firmware-a-latest/drivers/rambus/
Dtrng_ip_76.c90 uint16_t *regs; member
99 return mmio_read_32(dev->base + dev->regs[reg]); in eip76_rng_read()
105 mmio_write_32(dev->base + dev->regs[reg], val); in eip76_rng_write()
186 (void *)(eip76_dev.base + eip76_dev.regs[RNG_OUTPUT_0_REG]), in eip76_rng_read_rand_buf()
199 eip76_dev.regs = reg_map_eip76; in eip76_rng_probe()
/trusted-firmware-a-latest/plat/arm/board/common/
Dboard_common.mk18 ifeq (${ARM_ROTPK_LOCATION}, regs)
26 $(warning Development keys support for FVP is deprecated. Use `regs` \
34 $(warning Development keys support for FVP is deprecated. Use `regs` \
40 $(warning Development keys support for FVP is deprecated. Use `regs` \
50 $(warning Development keys support for FVP is deprecated. Use `regs` \
/trusted-firmware-a-latest/include/arch/aarch64/
Dsmccc_helpers.h110 const gp_regs_t *regs = get_gpregs_ctx(_hdl); \
111 _x1 = read_ctx_reg(regs, CTX_GPREG_X1); \
112 _x2 = read_ctx_reg(regs, CTX_GPREG_X2); \
113 _x3 = read_ctx_reg(regs, CTX_GPREG_X3); \
114 _x4 = read_ctx_reg(regs, CTX_GPREG_X4); \
/trusted-firmware-a-latest/drivers/nxp/ddr/phy-gen2/
Dphy.c2488 struct ddr_cfg_regs *regs = &priv->ddr_reg; in compute_ddr_phy() local
2532 input.mr[0] = regs->sdram_mode[0] & U(0xffff); in compute_ddr_phy()
2533 input.mr[1] = regs->sdram_mode[0] >> 16U; in compute_ddr_phy()
2534 input.mr[2] = regs->sdram_mode[1] >> 16U; in compute_ddr_phy()
2535 input.mr[3] = regs->sdram_mode[1] & U(0xffff); in compute_ddr_phy()
2536 input.mr[4] = regs->sdram_mode[8] >> 16U; in compute_ddr_phy()
2537 input.mr[5] = regs->sdram_mode[8] & U(0xffff); in compute_ddr_phy()
2538 input.mr[6] = regs->sdram_mode[9] >> 16U; in compute_ddr_phy()
2542 if ((regs->cs[i].config & SDRAM_CS_CONFIG_EN) == 0U) { in compute_ddr_phy()
2545 odt_rd = (regs->cs[i].config >> 20U) & U(0x7); in compute_ddr_phy()
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/trusted-firmware-a-latest/include/services/trp/
Dtrp_helpers.h28 uint64_t regs[TRP_ARGS_END >> 3]; member
/trusted-firmware-a-latest/services/std_svc/rmmd/trp/
Dtrp_private.h25 #define write_trp_arg(args, offset, val) (((args)->regs[offset >> 3]) \
/trusted-firmware-a-latest/include/lib/el3_runtime/aarch32/
Dcontext.h46 DEFINE_REG_STRUCT(regs, CTX_REG_ALL);
/trusted-firmware-a-latest/services/std_svc/rmmd/
Drmmd_main.c113 static void rmm_el2_context_init(el2_sysregs_t *regs) in rmm_el2_context_init() argument
115 regs->ctx_regs[CTX_SPSR_EL2 >> 3] = REALM_SPSR_EL2; in rmm_el2_context_init()
116 regs->ctx_regs[CTX_SCTLR_EL2 >> 3] = SCTLR_EL2_RES1; in rmm_el2_context_init()
/trusted-firmware-a-latest/include/lib/el3_runtime/aarch64/
Dcontext.h549 void el1_sysregs_context_save(el1_sysregs_t *regs);
550 void el1_sysregs_context_restore(el1_sysregs_t *regs);
553 void fpregs_context_save(fp_regs_t *regs);
554 void fpregs_context_restore(fp_regs_t *regs);
/trusted-firmware-a-latest/include/drivers/nxp/ddr/
Dddr.h136 const struct ddr_cfg_regs *regs,
/trusted-firmware-a-latest/include/drivers/nxp/crypto/caam/
Dsec_hw_specific.h497 static inline void hw_enqueue_desc_on_job_ring(struct jobring_regs *regs, in hw_enqueue_desc_on_job_ring() argument
500 sec_out32(&regs->irja, num); in hw_enqueue_desc_on_job_ring()
/trusted-firmware-a-latest/plat/nxp/soc-ls1046a/ls1046ardb/
Dddr_init.c160 const struct ddr_cfg_regs *regs; member
182 memcpy(&priv->ddr_reg, table[i].regs, in board_static_ddr()
/trusted-firmware-a-latest/docs/design/
Dtrusted-board-boot-build.rst49 - ``ARM_ROTPK_LOCATION=regs``: the ROTPK hash is obtained from the Trusted
Dfirmware-design.rst1283 gicd_ispendr regs (Offsets 0x200-0x278)
/trusted-firmware-a-latest/docs/plat/arm/
Darm-build-options.rst59 - ``regs`` : return the ROTPK hash stored in the Trusted root-key storage
/trusted-firmware-a-latest/
DMakefile237 TF_CFLAGS_aarch64 += -mgeneral-regs-only -mstrict-align
/trusted-firmware-a-latest/docs/
Dchange-log.md516 …- add partition info get regs ([0b850e9](https://review.trustedfirmware.org/plugins/gitiles/TF-A/t…
3532 …- add support to save and restore fp regs ([15dd6f1](https://review.trustedfirmware.org/plugins/gi…
3627 …- preserve x1/x2 regs in console_a3700_core_init() ([7c85a75](https://review.trustedfirmware.org/p…