Searched refs:DATA (Results 1 – 8 of 8) sorted by relevance
| /trusted-firmware-a-3.7.0/plat/imx/common/include/sci/ |
| D | sci_rpc.h | 32 #define RPC_I32(MSG, IDX) ((MSG)->DATA.i32[(IDX) / 4U])
33 #define RPC_I16(MSG, IDX) ((MSG)->DATA.i16[(IDX) / 2U])
34 #define RPC_I8(MSG, IDX) ((MSG)->DATA.i8[(IDX)])
35 #define RPC_U32(MSG, IDX) ((MSG)->DATA.u32[(IDX) / 4U])
36 #define RPC_U16(MSG, IDX) ((MSG)->DATA.u16[(IDX) / 2U])
37 #define RPC_U8(MSG, IDX) ((MSG)->DATA.u8[(IDX)])
75 } DATA; member
|
| /trusted-firmware-a-3.7.0/plat/imx/common/ |
| D | lpuart_console.S | 52 str w2, [x1, #DATA]
57 str w0, [x1, #DATA]
|
| /trusted-firmware-a-3.7.0/plat/imx/common/sci/ |
| D | ipc.c | 90 &(msg->DATA.u32[count - 1])); in sc_ipc_read()
116 msg->DATA.u32[count - 1]); in sc_ipc_write()
|
| /trusted-firmware-a-3.7.0/plat/imx/common/include/ |
| D | imx8_lpuart.h | 19 #define DATA 0x1C macro
|
| /trusted-firmware-a-3.7.0/plat/imx/imx8qx/ |
| D | imx8qx_bl31_setup.c | 188 mmio_write_32(IMX_BOOT_UART_BASE + DATA, 0x55); in lpuart32_serial_init()
189 mmio_write_32(IMX_BOOT_UART_BASE + DATA, 0x55); in lpuart32_serial_init()
190 mmio_write_32(IMX_BOOT_UART_BASE + DATA, 0x0A); in lpuart32_serial_init()
|
| /trusted-firmware-a-3.7.0/plat/imx/imx8qm/ |
| D | imx8qm_bl31_setup.c | 167 mmio_write_32(IMX_BOOT_UART_BASE + DATA, 0x55); in lpuart32_serial_init()
168 mmio_write_32(IMX_BOOT_UART_BASE + DATA, 0x55); in lpuart32_serial_init()
169 mmio_write_32(IMX_BOOT_UART_BASE + DATA, 0x0A); in lpuart32_serial_init()
|
| /trusted-firmware-a-3.7.0/plat/nvidia/tegra/scat/ |
| D | bl31.scat | 45 .ANY2(+RO-DATA)
|
| /trusted-firmware-a-3.7.0/docs/ |
| D | license.rst | 32 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
