Searched refs:OSCCTRL (Results 1 – 3 of 3) sorted by relevance
57 OSCCTRL->Dpll[n].DPLLCTRLA.bit.ENABLE = 0; in dpll_init()58 while (OSCCTRL->Dpll[n].DPLLSYNCBUSY.reg) { in dpll_init()66 OSCCTRL->Dpll[n].DPLLRATIO.reg = OSCCTRL_DPLLRATIO_LDRFRAC(LDR & 0x1F) in dpll_init()70 OSCCTRL->Dpll[n].DPLLCTRLB.reg = OSCCTRL_DPLLCTRLB_REFCLK_GCLK in dpll_init()74 OSCCTRL->Dpll[n].DPLLCTRLA.reg = OSCCTRL_DPLLCTRLA_ENABLE; in dpll_init()76 while (OSCCTRL->Dpll[n].DPLLSYNCBUSY.reg) { in dpll_init()78 while (!(OSCCTRL->Dpll[n].DPLLSTATUS.bit.CLKRDY && in dpll_init()79 OSCCTRL->Dpll[n].DPLLSTATUS.bit.LOCK)) { in dpll_init()92 OSCCTRL->DFLLCTRLB.reg = reg; in dfll_init()93 OSCCTRL->DFLLCTRLA.reg = OSCCTRL_DFLLCTRLA_ENABLE; in dfll_init()[all …]
39 OSCCTRL->OSC16MCTRL.bit.ENABLE = 0; in gclk_reset()94 OSCCTRL->OSC16MCTRL.reg = 0 in osc16m_init()101 while (!OSCCTRL->STATUS.bit.OSC16MRDY) { in osc16m_init()148 OSCCTRL->DFLLCTRL.reg = 0 in dfll48m_init()157 OSCCTRL->DFLLVAL.reg = 0 in dfll48m_init()162 OSCCTRL->DFLLMUL.reg = 0 in dfll48m_init()185 while (!OSCCTRL->STATUS.bit.DFLLRDY) { in dfll48m_init()187 OSCCTRL->DFLLCTRL.bit.ENABLE = 1; in dfll48m_init()191 while (!OSCCTRL->STATUS.bit.DFLLLCKC || !OSCCTRL->STATUS.bit.DFLLLCKF) { in dfll48m_init()
27 OSCCTRL->OSC48MDIV.bit.DIV = 0; in osc48m_init()28 while (OSCCTRL->OSC48MSYNCBUSY.bit.OSC48MDIV) { in osc48m_init()30 while (!OSCCTRL->STATUS.bit.OSC48MRDY) { in osc48m_init()
