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Searched refs:ui32Reg (Results 1 – 18 of 18) sorted by relevance

/hal_ti-3.4.0/simplelink/source/ti/devices/cc13x2x7_cc26x2x7/driverlib/
Dadi.h147 ADI8RegWrite(uint32_t ui32Base, uint32_t ui32Reg, uint8_t ui8Val) in ADI8RegWrite() argument
151 ASSERT(ui32Reg < ADI_SLAVE_REGS); in ADI8RegWrite()
154 HWREGB(ui32Base + ui32Reg) = ui8Val; in ADI8RegWrite()
188 ADI16RegWrite(uint32_t ui32Base, uint32_t ui32Reg, in ADI16RegWrite() argument
193 ASSERT(ui32Reg < ADI_SLAVE_REGS); in ADI16RegWrite()
196 HWREGH(ui32Base + (ui32Reg & 0xFE)) = ui16Val; in ADI16RegWrite()
230 ADI32RegWrite(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Val) in ADI32RegWrite() argument
234 ASSERT(ui32Reg < ADI_SLAVE_REGS); in ADI32RegWrite()
237 HWREG(ui32Base + (ui32Reg & 0xFC)) = ui32Val; in ADI32RegWrite()
262 ADI8RegRead(uint32_t ui32Base, uint32_t ui32Reg) in ADI8RegRead() argument
[all …]
Dvims.c64 uint32_t ui32Reg; in VIMSConfigure() local
69 ui32Reg = HWREG(ui32Base + VIMS_O_CTL); in VIMSConfigure()
70 ui32Reg &= ~(VIMS_CTL_PREF_EN | VIMS_CTL_ARB_CFG); in VIMSConfigure()
73 ui32Reg |= VIMS_CTL_ARB_CFG; in VIMSConfigure()
77 ui32Reg |= VIMS_CTL_PREF_EN; in VIMSConfigure()
81 HWREG(ui32Base + VIMS_O_CTL) = ui32Reg; in VIMSConfigure()
92 uint32_t ui32Reg; in VIMSModeSet() local
102 ui32Reg = HWREG(ui32Base + VIMS_O_CTL); in VIMSModeSet()
103 ui32Reg &= ~VIMS_CTL_MODE_M; in VIMSModeSet()
104 ui32Reg |= (ui32Mode & VIMS_CTL_MODE_M); in VIMSModeSet()
[all …]
Dddi.h158 DDI32RegRead(uint32_t ui32Base, uint32_t ui32Reg) in DDI32RegRead() argument
162 ASSERT(ui32Reg < DDI_SLAVE_REGS); in DDI32RegRead()
165 return(HWREG(ui32Base + ui32Reg)); in DDI32RegRead()
188 DDI32BitsSet(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Val) in DDI32BitsSet() argument
194 ASSERT(ui32Reg < DDI_SLAVE_REGS); in DDI32BitsSet()
201 HWREG(ui32Base + ui32RegOffset + ui32Reg) = ui32Val; in DDI32BitsSet()
219 DDI32BitsClear(uint32_t ui32Base, uint32_t ui32Reg, in DDI32BitsClear() argument
226 ASSERT(ui32Reg < DDI_SLAVE_REGS); in DDI32BitsClear()
233 HWREG(ui32Base + ui32RegOffset + ui32Reg) = ui32Val; in DDI32BitsClear()
261 DDI8SetValBit(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Byte, in DDI8SetValBit() argument
[all …]
Dddi.c64 DDI32RegWrite(uint32_t ui32Base, uint32_t ui32Reg, in DDI32RegWrite() argument
69 ASSERT(ui32Reg < DDI_SLAVE_REGS); in DDI32RegWrite()
72 HWREG(ui32Base + ui32Reg) = ui32Val; in DDI32RegWrite()
81 DDI16BitWrite(uint32_t ui32Base, uint32_t ui32Reg, in DDI16BitWrite() argument
93 ui32RegAddr = ui32Base + (ui32Reg << 1) + DDI_O_MASK16B; in DDI16BitWrite()
115 DDI16BitfieldWrite(uint32_t ui32Base, uint32_t ui32Reg, in DDI16BitfieldWrite() argument
126 ui32RegAddr = ui32Base + (ui32Reg << 1) + DDI_O_MASK16B; in DDI16BitfieldWrite()
149 DDI16BitRead(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask) in DDI16BitRead() argument
158 ui32RegAddr = ui32Base + ui32Reg + DDI_O_DIR; in DDI16BitRead()
183 DDI16BitfieldRead(uint32_t ui32Base, uint32_t ui32Reg, in DDI16BitfieldRead() argument
[all …]
Daon_pmctl.h126 uint32_t ui32Reg; in AONPMCTLMcuSRamRetConfig() local
136ui32Reg = HWREG(AON_PMCTL_BASE + NONSECURE_OFFSET + AON_PMCTL_O_RAMCFG) & ~AON_PMCTL_RAMCFG_BUS_SR… in AONPMCTLMcuSRamRetConfig()
137 ui32Reg |= ui32Retention; in AONPMCTLMcuSRamRetConfig()
138 HWREG(AON_PMCTL_BASE + NONSECURE_OFFSET + AON_PMCTL_O_RAMCFG) = ui32Reg; in AONPMCTLMcuSRamRetConfig()
Daux_tdc.c86 uint32_t ui32Reg; in AUXTDCMeasurementDone() local
93 ui32Reg = HWREG(ui32Base + AUX_TDC_O_STAT); in AUXTDCMeasurementDone()
94 if(ui32Reg & AUX_TDC_STAT_DONE) in AUXTDCMeasurementDone()
98 else if(ui32Reg & AUX_TDC_STAT_SAT) in AUXTDCMeasurementDone()
Dioc.c99 uint32_t ui32Reg; in IOCPortConfigureSet() local
106 ui32Reg = IOC_BASE + ( ui32IOId << 2 ); in IOCPortConfigureSet()
109 HWREG(ui32Reg) = ui32IOConfig | ui32PortId; in IOCPortConfigureSet()
120 uint32_t ui32Reg; in IOCPortConfigureGet() local
126 ui32Reg = IOC_BASE + ( ui32IOId << 2 ); in IOCPortConfigureGet()
129 return HWREG(ui32Reg); in IOCPortConfigureGet()
140 uint32_t ui32Reg; in IOCIOShutdownSet() local
150 ui32Reg = IOC_BASE + ( ui32IOId << 2 ); in IOCIOShutdownSet()
153 ui32Config = HWREG(ui32Reg); in IOCIOShutdownSet()
155 HWREG(ui32Reg) = ui32Config | ui32IOShutdown; in IOCIOShutdownSet()
[all …]
Dprcm.c260 uint32_t ui32Reg; in PRCMAudioClockConfigSet() local
317ui32Reg = HWREG(PRCM_BASE + NONSECURE_OFFSET + PRCM_O_I2SCLKCTL) & ~(PRCM_I2SCLKCTL_WCLK_PHASE_M | in PRCMAudioClockConfigSet()
319 HWREG(PRCM_BASE + NONSECURE_OFFSET + PRCM_O_I2SCLKCTL) = ui32Reg | ui32ClkConfig; in PRCMAudioClockConfigSet()
331 uint32_t ui32Reg; in PRCMAudioClockConfigSetOverride() local
352ui32Reg = HWREG(PRCM_BASE + NONSECURE_OFFSET + PRCM_O_I2SCLKCTL) & ~(PRCM_I2SCLKCTL_WCLK_PHASE_M | in PRCMAudioClockConfigSetOverride()
354 HWREG(PRCM_BASE + NONSECURE_OFFSET + PRCM_O_I2SCLKCTL) = ui32Reg | ui32ClkConfig; in PRCMAudioClockConfigSetOverride()
Drom.h311 ((void (*)(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask, uint32_t ui32WrData)) \
315 …((void (*)(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask, uint32_t ui32Shift, uint16_t ui…
319 ((uint16_t (*)(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask)) \
323 ((uint16_t (*)(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask, uint32_t ui32Shift)) \
327 ((void (*)(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Val)) \
/hal_ti-3.4.0/simplelink/source/ti/devices/cc13x2_cc26x2/driverlib/
Dadi.h149 ADI8RegWrite(uint32_t ui32Base, uint32_t ui32Reg, uint8_t ui8Val) in ADI8RegWrite() argument
153 ASSERT(ui32Reg < ADI_SLAVE_REGS); in ADI8RegWrite()
156 HWREGB(ui32Base + ui32Reg) = ui8Val; in ADI8RegWrite()
190 ADI16RegWrite(uint32_t ui32Base, uint32_t ui32Reg, in ADI16RegWrite() argument
195 ASSERT(ui32Reg < ADI_SLAVE_REGS); in ADI16RegWrite()
198 HWREGH(ui32Base + (ui32Reg & 0xFE)) = ui16Val; in ADI16RegWrite()
232 ADI32RegWrite(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Val) in ADI32RegWrite() argument
236 ASSERT(ui32Reg < ADI_SLAVE_REGS); in ADI32RegWrite()
239 HWREG(ui32Base + (ui32Reg & 0xFC)) = ui32Val; in ADI32RegWrite()
264 ADI8RegRead(uint32_t ui32Base, uint32_t ui32Reg) in ADI8RegRead() argument
[all …]
Dvims.c66 uint32_t ui32Reg; in VIMSConfigure() local
71 ui32Reg = HWREG(ui32Base + VIMS_O_CTL); in VIMSConfigure()
72 ui32Reg &= ~(VIMS_CTL_PREF_EN | VIMS_CTL_ARB_CFG); in VIMSConfigure()
75 ui32Reg |= VIMS_CTL_ARB_CFG; in VIMSConfigure()
79 ui32Reg |= VIMS_CTL_PREF_EN; in VIMSConfigure()
83 HWREG(ui32Base + VIMS_O_CTL) = ui32Reg; in VIMSConfigure()
94 uint32_t ui32Reg; in VIMSModeSet() local
104 ui32Reg = HWREG(ui32Base + VIMS_O_CTL); in VIMSModeSet()
105 ui32Reg &= ~VIMS_CTL_MODE_M; in VIMSModeSet()
106 ui32Reg |= (ui32Mode & VIMS_CTL_MODE_M); in VIMSModeSet()
[all …]
Dddi.h161 DDI32RegRead(uint32_t ui32Base, uint32_t ui32Reg) in DDI32RegRead() argument
165 ASSERT(ui32Reg < DDI_SLAVE_REGS); in DDI32RegRead()
168 return(HWREG(ui32Base + ui32Reg)); in DDI32RegRead()
191 DDI32BitsSet(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Val) in DDI32BitsSet() argument
197 ASSERT(ui32Reg < DDI_SLAVE_REGS); in DDI32BitsSet()
204 HWREG(ui32Base + ui32RegOffset + ui32Reg) = ui32Val; in DDI32BitsSet()
222 DDI32BitsClear(uint32_t ui32Base, uint32_t ui32Reg, in DDI32BitsClear() argument
229 ASSERT(ui32Reg < DDI_SLAVE_REGS); in DDI32BitsClear()
236 HWREG(ui32Base + ui32RegOffset + ui32Reg) = ui32Val; in DDI32BitsClear()
264 DDI8SetValBit(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Byte, in DDI8SetValBit() argument
[all …]
Dddi.c66 DDI32RegWrite(uint32_t ui32Base, uint32_t ui32Reg, in DDI32RegWrite() argument
71 ASSERT(ui32Reg < DDI_SLAVE_REGS); in DDI32RegWrite()
74 HWREG(ui32Base + ui32Reg) = ui32Val; in DDI32RegWrite()
83 DDI16BitWrite(uint32_t ui32Base, uint32_t ui32Reg, in DDI16BitWrite() argument
95 ui32RegAddr = ui32Base + (ui32Reg << 1) + DDI_O_MASK16B; in DDI16BitWrite()
117 DDI16BitfieldWrite(uint32_t ui32Base, uint32_t ui32Reg, in DDI16BitfieldWrite() argument
128 ui32RegAddr = ui32Base + (ui32Reg << 1) + DDI_O_MASK16B; in DDI16BitfieldWrite()
151 DDI16BitRead(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask) in DDI16BitRead() argument
160 ui32RegAddr = ui32Base + ui32Reg + DDI_O_DIR; in DDI16BitRead()
185 DDI16BitfieldRead(uint32_t ui32Base, uint32_t ui32Reg, in DDI16BitfieldRead() argument
[all …]
Daon_pmctl.h127 uint32_t ui32Reg; in AONPMCTLMcuSRamRetConfig() local
137 ui32Reg = HWREG(AON_PMCTL_BASE + AON_PMCTL_O_RAMCFG) & ~AON_PMCTL_RAMCFG_BUS_SRAM_RET_EN_M; in AONPMCTLMcuSRamRetConfig()
138 ui32Reg |= ui32Retention; in AONPMCTLMcuSRamRetConfig()
139 HWREG(AON_PMCTL_BASE + AON_PMCTL_O_RAMCFG) = ui32Reg; in AONPMCTLMcuSRamRetConfig()
Daux_tdc.c88 uint32_t ui32Reg; in AUXTDCMeasurementDone() local
95 ui32Reg = HWREG(ui32Base + AUX_TDC_O_STAT); in AUXTDCMeasurementDone()
96 if(ui32Reg & AUX_TDC_STAT_DONE) in AUXTDCMeasurementDone()
100 else if(ui32Reg & AUX_TDC_STAT_SAT) in AUXTDCMeasurementDone()
Dioc.c101 uint32_t ui32Reg; in IOCPortConfigureSet() local
108 ui32Reg = IOC_BASE + ( ui32IOId << 2 ); in IOCPortConfigureSet()
111 HWREG(ui32Reg) = ui32IOConfig | ui32PortId; in IOCPortConfigureSet()
122 uint32_t ui32Reg; in IOCPortConfigureGet() local
128 ui32Reg = IOC_BASE + ( ui32IOId << 2 ); in IOCPortConfigureGet()
131 return HWREG(ui32Reg); in IOCPortConfigureGet()
142 uint32_t ui32Reg; in IOCIOShutdownSet() local
152 ui32Reg = IOC_BASE + ( ui32IOId << 2 ); in IOCIOShutdownSet()
155 ui32Config = HWREG(ui32Reg); in IOCIOShutdownSet()
157 HWREG(ui32Reg) = ui32Config | ui32IOShutdown; in IOCIOShutdownSet()
[all …]
Dprcm.c262 uint32_t ui32Reg; in PRCMAudioClockConfigSet() local
319 ui32Reg = HWREG(PRCM_BASE + PRCM_O_I2SCLKCTL) & ~(PRCM_I2SCLKCTL_WCLK_PHASE_M | in PRCMAudioClockConfigSet()
321 HWREG(PRCM_BASE + PRCM_O_I2SCLKCTL) = ui32Reg | ui32ClkConfig; in PRCMAudioClockConfigSet()
333 uint32_t ui32Reg; in PRCMAudioClockConfigSetOverride() local
354 ui32Reg = HWREG(PRCM_BASE + PRCM_O_I2SCLKCTL) & ~(PRCM_I2SCLKCTL_WCLK_PHASE_M | in PRCMAudioClockConfigSetOverride()
356 HWREG(PRCM_BASE + PRCM_O_I2SCLKCTL) = ui32Reg | ui32ClkConfig; in PRCMAudioClockConfigSetOverride()
Drom.h313 ((void (*)(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask, uint32_t ui32WrData)) \
317 …((void (*)(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask, uint32_t ui32Shift, uint16_t ui…
321 ((uint16_t (*)(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask)) \
325 ((uint16_t (*)(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask, uint32_t ui32Shift)) \
329 ((void (*)(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Val)) \