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Searched refs:PD (Results 1 – 25 of 27) sorted by relevance

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/Zephyr-latest/include/zephyr/dt-bindings/pinctrl/
Dch32v003-pinctrl.h44 #define TIM1_ETR_PD4_2 CH32V003_PINMUX_DEFINE(PD, 4, TIM1, 2)
46 #define TIM1_CH1_PD2_0 CH32V003_PINMUX_DEFINE(PD, 2, TIM1, 0)
48 #define TIM1_CH1_PD2_2 CH32V003_PINMUX_DEFINE(PD, 2, TIM1, 2)
59 #define TIM1_CH4_PD3_1 CH32V003_PINMUX_DEFINE(PD, 3, TIM1, 1)
61 #define TIM1_CH4_PD4_3 CH32V003_PINMUX_DEFINE(PD, 4, TIM1, 3)
66 #define TIM1_CH1N_PD0_0 CH32V003_PINMUX_DEFINE(PD, 0, TIM1, 0)
68 #define TIM1_CH1N_PD0_2 CH32V003_PINMUX_DEFINE(PD, 0, TIM1, 2)
73 #define TIM1_CH2N_PD2_3 CH32V003_PINMUX_DEFINE(PD, 2, TIM1, 3)
74 #define TIM1_CH3N_PD1_0 CH32V003_PINMUX_DEFINE(PD, 1, TIM1, 0)
75 #define TIM1_CH3N_PD1_1 CH32V003_PINMUX_DEFINE(PD, 1, TIM1, 1)
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/Zephyr-latest/subsys/mgmt/osdp/
DKconfig.pd8 # operating as a PD.
13 In PD mode, number of connected PDs is always 1 and cannot
20 The number of commands that can be queued to a given PD. In CP mode,
21 the queue size is multiplied by number of connected PD so this can grow
29 The 7 least significant bits represent the address of the PD to which
30 the message is directed, or the address of the PD sending the reply.
40 Hexadecimal string representation of the 16 byte OSDP PD Secure
41 Channel Base Key. When this field is sent to "NONE", the PD is set to
42 "Install Mode". In this mode, the PD would allow a CP to setup a secure
44 default key, the CP can send a KEYSET command to set new keys to the PD.
[all …]
DKconfig.cp12 In PD mode, number of connected PDs is always 1 and cannot
19 Comma Separated Values of PD addresses. The number of values in this
26 The number of commands that can be queued to a given PD. In CP mode,
27 the queue size is multiplied by number of connected PD so this can grow
DCMakeLists.txt9 # PD mode specific sources
DKconfig24 Configure this device to operate as a PD (Peripheral Device)
99 CP and PD. Provide an available crypto driver name here.
/Zephyr-latest/drivers/power_domain/
DKconfig77 bool "NXP SCU-managed PD driver"
86 int "NXP SCU-managed PD driver init priority"
89 NXP SCU-managed PD driver initialization priority.
/Zephyr-latest/boards/microchip/ev11l78a/doc/
Dindex.rst8 Programmable USB Power Delivery (PD) Controller. This RoHS-compliant
10 USB Type-C™ Connector Specification and USB PD 3.0 specification.
16 - UPD301C combines a SAMD20 core and a UPD350 USB-PD controller
/Zephyr-latest/samples/subsys/mgmt/osdp/
DREADME.rst12 Devices (PD) to a Control Panel (CP) over a two-wire RS-485 multi-drop serial
22 OSDP Supports the control of the following components on a PD:
/Zephyr-latest/dts/arm/st/u5/
Dstm32u545.dtsi12 /* USB-C PD is not available on this part. */
/Zephyr-latest/boards/st/stm32g081b_eval/doc/
Dindex.rst8 and USB PD specification r3.0, two I2Cs, two SPIs, five USARTs, one LP UART,
14 with USB PD, motor control connector, RS232, RS485, Audio DAC, microphone ADC,
27 only. Both support USB PD protocol and alternate mode functionality.
74 - USB PD on Type-C port1
82 - 19 V power jack for USB PD
/Zephyr-latest/doc/hardware/peripherals/
Dbc12.rst14 Note that the `BC1.2 Specification`_ uses the acronym PD for Portable Device. This
16 acronym PD.
27 Allowed PD (portable device) Current Draw from Charging Port IDEV_CHG 1.5 A
/Zephyr-latest/boards/weact/stm32g431_core/doc/
Dindex.rst10 The board does not support USB-C PD in its standard configuration. To enable USB-C PD, CC1
24 PD signaling unless dead battery support has been enabled. A USB-C to USB-A adapter or
/Zephyr-latest/boards/cypress/cy8ckit_062_wifi_bt/doc/
Dindex.rst30 1. USB PD output voltage availability indicator (LED7)
33 4. Cypress EZ-PD™ CCG3 Type-C Port Controller with PD (CYPD3125-40LQXI, U3)
66 37. USB PD output voltage (9V/12V) connector (J16)
/Zephyr-latest/boards/cypress/cy8ckit_062_ble/doc/
Dindex.rst20 delivery system (EZ-PD™ CCG3), 5-segment CapSense slider, two CapSense
38 2. USB PD output voltage availability indicator (LED7)
40 4. Cypress EZ-PD™ CCG3 Type-C Port Controller with PD (CYPD3125-40LQXI, U3)
73 37. USB PD output voltage (9V/12V) connector (J16)
/Zephyr-latest/boards/st/b_g474e_dpow1/doc/
Dindex.rst8 embedded RAM, math accelerator functions and USB-PD 3.0 offered by STM32G474RET6,
17 - USB Type-C™ with USB 2.0 FS interface compatible with USB-PD 3.0
/Zephyr-latest/doc/hardware/arch/
Dx86.rst70 must reside in their own 4MB region, due to each entry of PD
/Zephyr-latest/boards/olimex/stm32_e407/doc/
Dindex.rst201 PD
/Zephyr-latest/boards/olimex/stm32_h407/doc/
Dindex.rst203 PD
/Zephyr-latest/modules/openthread/
DKconfig.features68 bool "DHCPv6-PD support in border routing"
DCMakeLists.txt52 …NFIG_OPENTHREAD_BORDER_ROUTING_DHCP6_PD OT_BORDER_ROUTING_DHCP6_PD "DHCPv6-PD support in border ro…
/Zephyr-latest/boards/espressif/esp32c3_rust/doc/
Dindex.rst123 * USB type-C (*no PD compatibility*).
/Zephyr-latest/dts/bindings/
Dvendor-prefixes.txt384 logicpd Logic PD, Inc.
/Zephyr-latest/doc/releases/
Drelease-notes-3.3.rst14 * Introduced :ref:`USB-C <usbc_api>` device stack with PD (power delivery)
2750 - :github:`53939` - USB C PD stack no callback for MSG_NOT_SUPPORTED_RECEIVED policy notify
2965 * :github:`54209` - USB C PD dead battery support
2996 * :github:`53952` - USB C PD sink sample stops working when connected to a non-PD source
Drelease-notes-2.6.rst1664 * :github:`33253` - STM32G4 with USB-C PD: Some pins cannot be used as input by default
2090 * :github:`27525` - Including STM32Cube's USB PD support to Zephyr
Drelease-notes-3.7.rst1978 old one by a rogue PD sending an out-of-order secure channel response resulting

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