Searched refs:GPT_O_TAMR (Results 1 – 4 of 4) sorted by relevance
150 HWREG(ui32Base + GPT_O_TAMR) = (ui32Config & 0xFF) | GPT_TAMR_TAPWMIE; in TimerConfigure()214 HWREG(ui32Base + GPT_O_TAMR) |= GPT_TAMR_TAWOT; in TimerWaitOnTriggerControl()218 HWREG(ui32Base + GPT_O_TAMR) &= ~(GPT_TAMR_TAWOT); in TimerWaitOnTriggerControl()332 HWREG(ui32Base + GPT_O_TAMR) &= ~(GPT_TAMR_TAMRSU); in TimerMatchUpdateMode()336 HWREG(ui32Base + GPT_O_TAMR) |= GPT_TAMR_TAMRSU; in TimerMatchUpdateMode()372 HWREG(ui32Base + GPT_O_TAMR) &= ~(GPT_TAMR_TAILD); in TimerIntervalLoadMode()376 HWREG(ui32Base + GPT_O_TAMR) |= GPT_TAMR_TAILD; in TimerIntervalLoadMode()
148 HWREG(ui32Base + GPT_O_TAMR) = (ui32Config & 0xFF) | GPT_TAMR_TAPWMIE; in TimerConfigure()212 HWREG(ui32Base + GPT_O_TAMR) |= GPT_TAMR_TAWOT; in TimerWaitOnTriggerControl()216 HWREG(ui32Base + GPT_O_TAMR) &= ~(GPT_TAMR_TAWOT); in TimerWaitOnTriggerControl()330 HWREG(ui32Base + GPT_O_TAMR) &= ~(GPT_TAMR_TAMRSU); in TimerMatchUpdateMode()334 HWREG(ui32Base + GPT_O_TAMR) |= GPT_TAMR_TAMRSU; in TimerMatchUpdateMode()370 HWREG(ui32Base + GPT_O_TAMR) &= ~(GPT_TAMR_TAILD); in TimerIntervalLoadMode()374 HWREG(ui32Base + GPT_O_TAMR) |= GPT_TAMR_TAILD; in TimerIntervalLoadMode()
50 #define GPT_O_TAMR 0x00000004 macro