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Searched refs:FLCTL_A_BANK0_RDCTL_WAIT_MASK (Results 1 – 8 of 8) sorted by relevance

/hal_ti-3.4.0/simplelink/source/ti/devices/msp432p4xx/startup_system_files/
Dsystem_msp432p4111.c368 FLCTL_A->BANK0_RDCTL &= ~FLCTL_A_BANK0_RDCTL_WAIT_MASK | FLCTL_A_BANK0_RDCTL_WAIT_2; in SystemInit()
369 FLCTL_A->BANK1_RDCTL &= ~FLCTL_A_BANK0_RDCTL_WAIT_MASK | FLCTL_A_BANK0_RDCTL_WAIT_2; in SystemInit()
395 FLCTL_A->BANK0_RDCTL &= ~FLCTL_A_BANK0_RDCTL_WAIT_MASK | FLCTL_A_BANK0_RDCTL_WAIT_3; in SystemInit()
Dsystem_msp432p411v.c368 FLCTL_A->BANK0_RDCTL &= ~FLCTL_A_BANK0_RDCTL_WAIT_MASK | FLCTL_A_BANK0_RDCTL_WAIT_2; in SystemInit()
369 FLCTL_A->BANK1_RDCTL &= ~FLCTL_A_BANK0_RDCTL_WAIT_MASK | FLCTL_A_BANK0_RDCTL_WAIT_2; in SystemInit()
395 FLCTL_A->BANK0_RDCTL &= ~FLCTL_A_BANK0_RDCTL_WAIT_MASK | FLCTL_A_BANK0_RDCTL_WAIT_3; in SystemInit()
Dsystem_msp432p411y.c368 FLCTL_A->BANK0_RDCTL &= ~FLCTL_A_BANK0_RDCTL_WAIT_MASK | FLCTL_A_BANK0_RDCTL_WAIT_2; in SystemInit()
369 FLCTL_A->BANK1_RDCTL &= ~FLCTL_A_BANK0_RDCTL_WAIT_MASK | FLCTL_A_BANK0_RDCTL_WAIT_2; in SystemInit()
395 FLCTL_A->BANK0_RDCTL &= ~FLCTL_A_BANK0_RDCTL_WAIT_MASK | FLCTL_A_BANK0_RDCTL_WAIT_3; in SystemInit()
/hal_ti-3.4.0/simplelink/source/ti/devices/msp432p4xx/driverlib/
Dflash_a.c1401 & ~FLCTL_A_BANK0_RDCTL_WAIT_MASK) in FlashCtl_A_setWaitState()
1418 return (FLCTL_A->BANK0_RDCTL & FLCTL_A_BANK0_RDCTL_WAIT_MASK) in FlashCtl_A_getWaitState()
/hal_ti-3.4.0/simplelink/source/ti/devices/msp432p4xx/inc/
Dmsp432p4111.h4049 #define FLCTL_A_BANK0_RDCTL_WAIT_MASK ((uint32_t)0x0000F000) /*!< WAIT Bit Mask… macro
Dmsp432p411v.h4049 #define FLCTL_A_BANK0_RDCTL_WAIT_MASK ((uint32_t)0x0000F000) /*!< WAIT Bit Mask… macro
Dmsp432p411y.h4049 #define FLCTL_A_BANK0_RDCTL_WAIT_MASK ((uint32_t)0x0000F000) /*!< WAIT Bit Mask… macro
Dmsp432p4xx.h5313 #define FLCTL_A_BANK0_RDCTL_WAIT_MASK ((uint32_t)0x0000F000) /*!< WAIT Bit Mask… macro