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Searched refs:SPI_CR1_CPHA (Results 1 – 25 of 269) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_spi.h166 #define LL_SPI_PHASE_2EDGE (SPI_CR1_CPHA) /*!< Second clock transition i…
457 MODIFY_REG(SPIx->CR1, SPI_CR1_CPHA, ClockPhase); in LL_SPI_SetClockPhase()
470 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA)); in LL_SPI_GetClockPhase()
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_ll_spi.h166 #define LL_SPI_PHASE_2EDGE (SPI_CR1_CPHA) /*!< Second clock transition i…
457 MODIFY_REG(SPIx->CR1, SPI_CR1_CPHA, ClockPhase); in LL_SPI_SetClockPhase()
470 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA)); in LL_SPI_GetClockPhase()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_spi.h179 #define LL_SPI_PHASE_2EDGE (SPI_CR1_CPHA) /*!< Second clock transition i…
470 MODIFY_REG(SPIx->CR1, SPI_CR1_CPHA, ClockPhase); in LL_SPI_SetClockPhase()
483 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA)); in LL_SPI_GetClockPhase()
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_spi.h166 #define LL_SPI_PHASE_2EDGE (SPI_CR1_CPHA) /*!< Second clock transition i…
457 MODIFY_REG(SPIx->CR1, SPI_CR1_CPHA, ClockPhase); in LL_SPI_SetClockPhase()
470 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA)); in LL_SPI_GetClockPhase()
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_spi.h166 #define LL_SPI_PHASE_2EDGE (SPI_CR1_CPHA) /*!< Second clock transition i…
396 MODIFY_REG(SPIx->CR1, SPI_CR1_CPHA, ClockPhase); in LL_SPI_SetClockPhase()
409 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA)); in LL_SPI_GetClockPhase()
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_spi.h179 #define LL_SPI_PHASE_2EDGE (SPI_CR1_CPHA) /*!< Second clock transition i…
409 MODIFY_REG(SPIx->CR1, SPI_CR1_CPHA, ClockPhase); in LL_SPI_SetClockPhase()
422 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA)); in LL_SPI_GetClockPhase()
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_spi.h171 #define LL_SPI_PHASE_2EDGE (SPI_CR1_CPHA) /*!< Second clock transition i…
374 MODIFY_REG(SPIx->CR1, SPI_CR1_CPHA, ClockPhase); in LL_SPI_SetClockPhase()
387 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA)); in LL_SPI_GetClockPhase()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_spi.h166 #define LL_SPI_PHASE_2EDGE (SPI_CR1_CPHA) /*!< Second clock transition i…
396 MODIFY_REG(SPIx->CR1, SPI_CR1_CPHA, ClockPhase); in LL_SPI_SetClockPhase()
409 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA)); in LL_SPI_GetClockPhase()
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_spi.h169 #define LL_SPI_PHASE_2EDGE (SPI_CR1_CPHA) /*!< Second clock transition i…
401 MODIFY_REG(SPIx->CR1, SPI_CR1_CPHA, ClockPhase); in LL_SPI_SetClockPhase()
414 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA)); in LL_SPI_GetClockPhase()
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_spi.h166 #define LL_SPI_PHASE_2EDGE (SPI_CR1_CPHA) /*!< Second clock transition i…
457 MODIFY_REG(SPIx->CR1, SPI_CR1_CPHA, ClockPhase); in LL_SPI_SetClockPhase()
470 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA)); in LL_SPI_GetClockPhase()
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_spi.h166 #define LL_SPI_PHASE_2EDGE (SPI_CR1_CPHA) /*!< Second clock transition i…
457 MODIFY_REG(SPIx->CR1, SPI_CR1_CPHA, ClockPhase); in LL_SPI_SetClockPhase()
470 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA)); in LL_SPI_GetClockPhase()
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_spi.h166 #define LL_SPI_PHASE_2EDGE (SPI_CR1_CPHA) /*!< Second clock transition i…
457 MODIFY_REG(SPIx->CR1, SPI_CR1_CPHA, ClockPhase); in LL_SPI_SetClockPhase()
470 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA)); in LL_SPI_GetClockPhase()
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_spi.h166 #define LL_SPI_PHASE_2EDGE (SPI_CR1_CPHA) /*!< Second clock transition i…
457 MODIFY_REG(SPIx->CR1, SPI_CR1_CPHA, ClockPhase); in LL_SPI_SetClockPhase()
470 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA)); in LL_SPI_GetClockPhase()
/hal_stm32-latest/stm32cube/stm32wb0x/drivers/include/
Dstm32wb0x_ll_spi.h166 #define LL_SPI_PHASE_2EDGE (SPI_CR1_CPHA) /*!< Second clock transition i…
457 MODIFY_REG(SPIx->CR1, SPI_CR1_CPHA, ClockPhase); in LL_SPI_SetClockPhase()
470 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA)); in LL_SPI_GetClockPhase()
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_spi.h166 #define LL_SPI_PHASE_2EDGE (SPI_CR1_CPHA) /*!< Second clock transition i…
457 MODIFY_REG(SPIx->CR1, SPI_CR1_CPHA, ClockPhase); in LL_SPI_SetClockPhase()
470 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA)); in LL_SPI_GetClockPhase()
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_spi.h166 #define LL_SPI_PHASE_2EDGE (SPI_CR1_CPHA) /*!< Second clock transition i…
457 MODIFY_REG(SPIx->CR1, SPI_CR1_CPHA, ClockPhase); in LL_SPI_SetClockPhase()
470 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA)); in LL_SPI_GetClockPhase()
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_spi.h179 #define LL_SPI_PHASE_2EDGE (SPI_CR1_CPHA) /*!< Second clock transition i…
470 MODIFY_REG(SPIx->CR1, SPI_CR1_CPHA, ClockPhase); in LL_SPI_SetClockPhase()
483 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA)); in LL_SPI_GetClockPhase()
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/src/
Dstm32wbxx_ll_spi.c48 #define SPI_CR1_CLEAR_MASK (SPI_CR1_CPHA | SPI_CR1_CPOL | SPI_CR1_MSTR | \
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/src/
Dstm32u0xx_ll_spi.c48 #define SPI_CR1_CLEAR_MASK (SPI_CR1_CPHA | SPI_CR1_CPOL | SPI_CR1_MSTR | \
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_ll_spi.c48 #define SPI_CR1_CLEAR_MASK (SPI_CR1_CPHA | SPI_CR1_CPOL | SPI_CR1_MSTR | \
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_ll_spi.c48 #define SPI_CR1_CLEAR_MASK (SPI_CR1_CPHA | SPI_CR1_CPOL | SPI_CR1_MSTR | \
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/src/
Dstm32f2xx_ll_spi.c49 #define SPI_CR1_CLEAR_MASK (SPI_CR1_CPHA | SPI_CR1_CPOL | SPI_CR1_MSTR | \
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/src/
Dstm32l0xx_ll_spi.c49 #define SPI_CR1_CLEAR_MASK (SPI_CR1_CPHA | SPI_CR1_CPOL | SPI_CR1_MSTR | \
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/src/
Dstm32f1xx_ll_spi.c49 #define SPI_CR1_CLEAR_MASK (SPI_CR1_CPHA | SPI_CR1_CPOL | SPI_CR1_MSTR | \
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/src/
Dstm32l1xx_ll_spi.c49 #define SPI_CR1_CLEAR_MASK (SPI_CR1_CPHA | SPI_CR1_CPOL | SPI_CR1_MSTR | \

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